Re: sw guy question about latches

Discussion in 'VHDL' started by Mike Treseler, Jan 19, 2009.

  1. d p chang wrote:
    > i'm a sw guy wandering through teaching myself a little bit about
    > (digital) hw, and want to try to go about this 'idiomatically' rather
    > than trying to translate my sw thinking into hdl (and coming up w/ crap
    > hdl).


    Match a synchronous template.
    That will simplify synthesis.
    I recommend single process entities to
    the sequentially inclined.

    Details: http://mysite.verizon.net/miketreseler/
     
    Mike Treseler, Jan 19, 2009
    #1
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  2. d p chang wrote:

    > in my pci example, is there a way to parallelize?


    For vhdl, parallel description means multiple processes wired together.
    Serial description means one process wired directly to entity ports.
    Either method works.
    It's the designer's choice.
    Good luck.

    -- Mike Treseler
     
    Mike Treseler, Jan 19, 2009
    #2
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