re: "Writing Makefiles for VHDL models" by Janick Bergeron

Discussion in 'VHDL' started by Alessandro Basili, Jul 19, 2011.

  1. Mr. Google did not find this article/book (I don't know what it is).
    Mr. Amazon did not find this article/book (same as before...).

    It is mentioned in the vmkr documentation by Bell-Northern Research VHDL
    Group
    (http://www.pldworld.com/_hdl/1/tech-www.informatik.uni-hamburg.de/vhdl/tools/vmkr/doc/vmkr.doc.ps)
    but no other references found.

    Does anyone know where I can find this article/book?

    As a parting note, does anyone have any suggestion/recommendation on the
    usage of vmkr?

    Al

    --
    A: Because it fouls the order in which people normally read text.
    Q: Why is top-posting such a bad thing?
    A: Top-posting.
    Q: What is the most annoying thing on usenet and in e-mail?
    Alessandro Basili, Jul 19, 2011
    #1
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  2. Alessandro Basili

    Daniel Leu Guest

    On Jul 19, 3:36 am, Alessandro Basili <>
    wrote:
    > Mr. Google did not find this article/book (I don't know what it is).
    > Mr. Amazon did not find this article/book (same as before...).
    >
    > It is mentioned in the vmkr documentation by Bell-Northern Research VHDL
    > Group
    > (http://www.pldworld.com/_hdl/1/tech-www.informatik.uni-hamburg.de/vhd...)
    > but no other references found.
    >
    > Does anyone know where I can find this article/book?
    >
    > As a parting note, does anyone have any suggestion/recommendation on the
    > usage of vmkr?


    Google provides some links if you just search for "makefiles
    bergeron":
    - www.vhdl.org/misc/ModelingGuidelines.paper.ps
    - pldworld.pe.kr/_hdl/1/RESOURCES/QUALIS/library/mb004.pdf

    Regards,
    Daniel
    Daniel Leu, Jul 20, 2011
    #2
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  3. On 7/20/2011 7:14 PM, Daniel Leu wrote:
    > Google provides some links if you just search for "makefiles
    > bergeron":
    > - www.vhdl.org/misc/ModelingGuidelines.paper.ps


    This (IMHO very interesting) article is "Guidelines for Writing VHDL
    Models in a Team Environment".

    > - pldworld.pe.kr/_hdl/1/RESOURCES/QUALIS/library/mb004.pdf
    >


    This is "Managing VHDL Models with Makefiles".

    Thanks for pointing them out, I'm trying to subscribe to "Verification
    Guild" but I still have some problems.
    Alessandro Basili, Jul 21, 2011
    #3
  4. Alessandro Basili, Jul 23, 2011
    #4
  5. Alessandro Basili

    hssig Guest

    On 24 Jul., 00:27, Alessandro Basili <>
    wrote:
    > On 7/20/2011 1:31 AM, Alan Fitch wrote:
    >
    > > Try posting your message on the Verification Guild
    > >http://verificationguild.com(I think, from memory). Janick started the
    > > website, and often posts there,

    >
    > In case somebody maybe interested, the article in the subject is indeed
    > this one:
    >
    > "Managing VHDL Models with Makefiles" by Janick Bergeron
    > (http://pldworld.pe.kr/_hdl/1/RESOURCES/QUALIS/library/mb004.pdf)





    Where can the tools described be downloaded ?

    Cheers, hssig
    hssig, Jul 25, 2011
    #5
  6. Alessandro Basili, Jul 25, 2011
    #6
  7. Alessandro Basili

    hssig Guest

    Is there a possibility to use that tool under Windows (7) ? How do I
    have to install it?

    Cheers,
    hssig
    hssig, Jul 27, 2011
    #7
  8. On 7/27/2011 2:36 PM, hssig wrote:
    > Is there a possibility to use that tool under Windows (7) ? How do I
    > have to install it?


    I think it is possible, if you have cygwin installed:

    http://www.cygwin.com/

    you should be able to install with a simple "make" command from the top
    level directory.
    I have to say I have not tried it yet. Just looking into it these days.

    >
    > Cheers,
    > hssig
    >
    Alessandro Basili, Jul 27, 2011
    #8
  9. Alessandro Basili

    HT-Lab Guest

    On 27/07/2011 13:36, hssig wrote:
    > Is there a possibility to use that tool under Windows (7) ? How do I
    > have to install it?
    >
    > Cheers,
    > hssig
    >


    As suggested earlier why don't you simply use vmake from Modelsim?

    Vmake can be used without a valid license (just extract after running
    the installer). Use vcom (also no valid license required) to compile
    your design followed by running vmake.

    You can now use any make program under windows (I use nmake from Visual
    C++) to process it.

    Vmake can also handle Verilog files but unfortunately not SystemC.

    Good luck,

    Hans
    www.ht-lab.com
    HT-Lab, Jul 27, 2011
    #9
  10. HT-Lab wrote:

    > On 27/07/2011 13:36, hssig wrote:
    >> Is there a possibility to use that tool under Windows (7) ? How do I
    >> have to install it?
    >>
    >> Cheers,
    >> hssig
    >>

    >
    > As suggested earlier why don't you simply use vmake from Modelsim?


    The major difference of course between vmake and a program like vmk is that
    vmake creates a makefile from already compiled libraries and that vmk
    creates a makefile directly from the VHDL sources.

    So for the initial compilation vmk must be used. Or manual compilation, and
    optional use of the vcom option "-just eapbc" and wildcards for the VHDL
    files. But that does not always work, for example if packages uses other
    packages from the same library.

    For keeping libraries up to date vmake might be more convenient to use.

    I use both vmake and vmk.

    --
    Paul Uiterlinden
    www.aimvalley.nl
    e-mail addres: remove the not.
    Paul Uiterlinden, Jul 28, 2011
    #10
  11. Alessandro Basili

    hssig Guest

    Hi Hans,

    do you have a real example to share in which you use vmake from
    Modelsim ?


    Cheers, Hssig
    hssig, Jul 28, 2011
    #11
  12. Alessandro Basili

    HT-Lab Guest

    On 28/07/2011 13:32, hssig wrote:
    > Hi Hans,
    >
    > do you have a real example to share in which you use vmake from
    > Modelsim ?
    >
    >
    > Cheers, Hssig
    >

    Hi Hssig,

    If you have Modelsim installed then you can use one of their examples:

    Navigate to ..\examples\tutorials\vhdl\basicSimulation, then execute

    vlib work
    vcom *.vhd
    vmake > Makefile
    nmake

    modify one of the VHDL files and run nmake/make etc again. I would
    recommend you have a quick look at the vmap command as well as you might
    need it.

    Good luck,

    Hans.
    www.ht-lab.com
    HT-Lab, Jul 29, 2011
    #12
  13. Alessandro Basili

    hssig Guest

    Hi Hans,

    I have tried to run the example. But when typing "vmake > Makefile" I
    get the error message:
    # The vmake utility must be run from a Unix shell or a Windows/DOS
    prompt.

    I am using Modelsim PE 10.0b


    Cheers, Hssig
    hssig, Jul 30, 2011
    #13
  14. On Sat, 30 Jul 2011 04:07:57 -0700 (PDT), hssig <> wrote:

    >I have tried to run the example. But when typing "vmake > Makefile" I
    >get the error message:
    ># The vmake utility must be run from a Unix shell or a Windows/DOS
    >prompt.


    Well, it's hard to see how the error message could be
    any clearer :)

    Obviously you're running from within ModelSim's GUI, or Tcl
    console. Fortunately Tcl comes to your rescue here:

    exec vmake > Makefile

    should do what you want. Of course, you *could* perhaps
    RTFM and run vmake directly from the command prompt...

    PS: exec is Tcl's command to run an external program. It does
    a pretty good job of faking-up the environment to fool the
    program into thinking it has been run from the DOS prompt.
    --
    Jonathan Bromley
    Jonathan Bromley, Jul 30, 2011
    #14
  15. Alessandro Basili

    Anssi Saari Guest

    Paul Uiterlinden <> writes:

    > I use both vmake and vmk.


    Now that we're on the topic, what's a good make tool to use with vmake
    on Windows? Gnu make included in Cygwin doesn't seem to like the
    generated makefiles... I've been using make from unxutils, but it
    seems to have a problem with time and imagines my files have a
    modification time in the future and so on. It works, though.
    Anssi Saari, Aug 11, 2011
    #15
  16. Anssi Saari <> wrote:
    >
    > Now that we're on the topic, what's a good make tool to use with vmake
    > on Windows? Gnu make included in Cygwin doesn't seem to like the
    > generated makefiles...


    Have you tried vmake's `-cygdrive' (IIRC) command line option?

    Enrik
    Enrik Berkhan, Aug 11, 2011
    #16
  17. Alessandro Basili

    Anssi Saari Guest

    Enrik Berkhan <> writes:

    > Anssi Saari <> wrote:
    >>
    >> Now that we're on the topic, what's a good make tool to use with vmake
    >> on Windows? Gnu make included in Cygwin doesn't seem to like the
    >> generated makefiles...

    >
    > Have you tried vmake's `-cygdrive' (IIRC) command line option?


    I take it that option is either new or non-existing? I'm using
    Modelsim 6.5 and 6.6.

    The specific error message from Gnu Make 3.81 in Cygwin is
    Makefile:153: *** multiple target patterns. Stop.

    On line 153 and onwards I have:

    $(WORK__altera_tb) \
    $(WORK__altera_tb__behavior) : altera_tb.vhd \
    $(IEEE__std_logic_1164)
    $(VCOM) -93 -O0 altera_tb.vhd

    Anyways, looks like I stumbled on a working make:

    GNU Make 3.82
    Built for i386-pc-mingw32

    I.e. the one included with mingw.
    Anssi Saari, Aug 12, 2011
    #17
  18. Anssi Saari wrote:

    > Paul Uiterlinden <> writes:
    >
    >> I use both vmake and vmk.

    >
    > Now that we're on the topic, what's a good make tool to use with vmake
    > on Windows?


    Sorry, I don't know. I don't use Windows.

    --
    Paul Uiterlinden
    www.aimvalley.nl
    e-mail addres: remove the not.
    Paul Uiterlinden, Aug 12, 2011
    #18
  19. Alessandro Basili

    Bart Fox Guest

    On 12.08.11 10:28, wrote Anssi Saari:
    > The specific error message from Gnu Make 3.81 in Cygwin is
    > Makefile:153: *** multiple target patterns. Stop.
    >
    > On line 153 and onwards I have:
    >
    > $(WORK__altera_tb) \
    > $(WORK__altera_tb__behavior) : altera_tb.vhd \
    > $(IEEE__std_logic_1164)
    > $(VCOM) -93 -O0 altera_tb.vhd

    There is a ":" in $(IEEE__std_logic_1164), right?

    > Anyways, looks like I stumbled on a working make:
    >
    > GNU Make 3.82
    > Built for i386-pc-mingw32
    >
    > I.e. the one included with mingw.

    Make 3.80 should also work with DOS-colons in path names.

    regards,
    Bart
    Bart Fox, Aug 12, 2011
    #19
  20. Anssi Saari <> wrote:
    > Enrik Berkhan <> writes:
    >> Have you tried vmake's `-cygdrive' (IIRC) command line option?

    >
    > I take it that option is either new or non-existing? I'm using
    > Modelsim 6.5 and 6.6.


    I'm using an Altera Modelsim ASE OEM version, obviously based on 6.6d.
    The header line in the generated Makefiles says 'vmake 2.2'.

    $ vmake -h
    Usage: vmake -help
    vmake [-fullsrcpath] [-cygdrive] [-nolinewrap] [-f <filename>]
    [-ignore <design_unit>] [-du <design_unit>] [<library>] [>
    <makefile>

    on Windows 7.

    Without `-cygdrive', vmake genrates something like this:

    ....
    LIB_IEEE = C:/altera/11.0/modelsim_ase/win32aloem/../ieee
    ....

    This variable introduces the spurious colon in the rules when expanded,
    leading to the error you described.

    With `-cygdrive', the line reads:

    ....
    LIB_IEEE = /cygdrive/c/altera/11.0/modelsim_ase/win32aloem/../ieee
    ....

    and everything will work fine with make under Cygwin.

    What vmake does not handle correctly though are path names containing
    spaces.

    Enrik
    Enrik Berkhan, Aug 13, 2011
    #20
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