Re: Xilinx VHDL coding styles,lookin for a tutorial

Discussion in 'VHDL' started by LittleAlex, Dec 2, 2008.

  1. LittleAlex

    LittleAlex Guest

    On Dec 2, 10:33 am, "blisca" <bliscachiocciolinatiscalipuntoit> wrote:
    > Hi
    > I am looking for information about good coding style when using Xilinx
    > devices(Spartan 3 mostly),i mean templates for correct and efficient
    > implementation of clock dividers,multiplexers,RAM and so on,so that the
    > result could be easy to analyze and synthesize to the tool
    > Many thanks
    > Diego

    When working with Spartan3 parts, I've found <> to be a
    good resource.

    xapp215.pdf> - "Design Tips for HDL ...
    <> -
    "Make your Design Up to 50% Smaller ...
    <> -
    "Synthesis and Simulation Design Guide"
    --- take a look at section 3 - "General Recommendations for Coding

    LittleAlex, Dec 2, 2008
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  2. Tricky

    Tricky Guest

    Tricky, Dec 3, 2008
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  3. Andy

    Andy Guest

    The Synthesis and Simulation design guide also still uses (clock'event
    and clock = '1') instead of rising_edge(clock).

    They recommend not using array ports anywhere.

    They do not say anything about records, loops, variables or integers
    (let alone numeric_std types).

    For most users HDL coding starts out as "coding a shchematic netlist",
    where specific processes or entities represent low level primitives
    and constructs, interconnected together (the signals represent the
    wires from the schematic).

    But at some point, in order to improve design productivity above that
    of drawing schematics or coding netlists, we have to raise the level
    of abstraction. This includes not only effective use of data types,
    but also the way we describe complex circuits. Abstraction also allows
    us to focus on the intended behavior of the circuit, rather than its
    structure. To be fair, when performance is pushing the limits of the
    target device, a more structural-relative approach may be needed. But
    in most cases, for most of a design, this is not necessary, and an
    approach that more clearly relates the intended behavior is easier to
    debug. When coupled with advanced optimizations such as register
    replication and/or retiming, a behavioral approach is often just as
    relevant to the structure of the implementation as a structural coding
    approach would have been.

    Like Mike Treseler, I use processes with variables to define the
    behavior of a circuit. Signals are only used to connect between
    processes in the same architecture, and often there is only one
    (somewhat large) process per architecture, so there are no signals at
    all. Descriptions and processes written this way "behave the way the
    code reads", rather than having suspended updates of signal values,
    etc. I do not use subprograms (functions or procedures) as a template
    per se, but to collect and/or generalize reusable code.

    Andy, Dec 3, 2008
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