Reading 16 bit words from a file

Discussion in 'VHDL' started by Fredxx, Aug 3, 2009.

  1. Fredxx

    Fredxx Guest

    I'm using the following lines which can read binary data from a file.

    signal data_char : STD_LOGIC_VECTOR(15 downto 0);

    type character_file is file of character;
    file myfile: character_file;
    variable character_variable : character;

    file_open ( myfile, "file_name", read_mode);
    read(myfile, character_variable);
    data_word <= CONV_STD_LOGIC_VECTOR(character'pos(character_variable), 16);


    But as is expected the 'character' is only 8 bits and only populates the
    lower 8 bits of data_word.

    Is VHDL able to read in 16 bit data, or should I give up now?
    Fredxx, Aug 3, 2009
    #1
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  2. Fredxx wrote:
    > I'm using the following lines which can read binary data from a file.
    >
    > signal data_char : STD_LOGIC_VECTOR(15 downto 0);
    >
    > type character_file is file of character;
    > file myfile: character_file;
    > variable character_variable : character;
    >
    > file_open ( myfile, "file_name", read_mode);
    > read(myfile, character_variable);
    > data_word <= CONV_STD_LOGIC_VECTOR(character'pos(character_variable), 16);
    >
    >
    > But as is expected the 'character' is only 8 bits and only populates the
    > lower 8 bits of data_word.
    >
    > Is VHDL able to read in 16 bit data, or should I give up now?


    Yes, but not not like that.
    Consider using vhdl constants as demonstrated in the previous thread.

    -- Mike Treseler
    Mike Treseler, Aug 3, 2009
    #2
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  3. Fredxx

    Fredxx Guest

    "Mike Treseler" <> wrote in message
    news:...
    > Fredxx wrote:
    >> I'm using the following lines which can read binary data from a file.
    >>
    >> signal data_char : STD_LOGIC_VECTOR(15 downto 0);
    >>
    >> type character_file is file of character;
    >> file myfile: character_file;
    >> variable character_variable : character;
    >>
    >> file_open ( myfile, "file_name", read_mode);
    >> read(myfile, character_variable);
    >> data_word <= CONV_STD_LOGIC_VECTOR(character'pos(character_variable),
    >> 16);
    >>
    >>
    >> But as is expected the 'character' is only 8 bits and only populates the
    >> lower 8 bits of data_word.
    >>
    >> Is VHDL able to read in 16 bit data, or should I give up now?

    >
    > Yes, but not not like that.
    > Consider using vhdl constants as demonstrated in the previous thread.
    >
    > -- Mike Treseler


    I did note your dislike of textio, however this is data from another
    program, so it wouldn't be straightforward to place in a constant array.

    Unless of course you know of any utilities which convert a binary file
    simply into a constant array VHDL file?
    Fredxx, Aug 4, 2009
    #3
  4. Fredxx

    Tricky Guest

    On Aug 3, 10:38 pm, "Fredxx" <> wrote:
    > I'm using the following lines which can read binary data from a file.
    >
    > signal data_char : STD_LOGIC_VECTOR(15 downto 0);
    >
    > type character_file is file of character;
    > file myfile: character_file;
    > variable character_variable : character;
    >
    > file_open ( myfile, "file_name", read_mode);
    > read(myfile, character_variable);
    > data_word <= CONV_STD_LOGIC_VECTOR(character'pos(character_variable), 16);
    >
    > But as is expected the 'character' is only 8 bits and only populates the
    > lower 8 bits of data_word.
    >
    > Is VHDL able to read in 16 bit data, or should I give up now?


    If you know the length of "data_word" just create a for loop to read
    each character into the different bytes of it.

    FILE_OPEN(myfile, "file_name", read_mode)

    for i in 0 to N_BYTES-1 loop
    read(myfile, c_buf);
    data_word((i+1)*8 -1 downto i*8) <= std_logic_vector(
    to_unsigned(
    character'pos(c_buf), 8
    )
    );
    end loop;
    Tricky, Aug 4, 2009
    #4
  5. "Fredxx" <> writes:

    > But as is expected the 'character' is only 8 bits and only populates the
    > lower 8 bits of data_word.
    >
    > Is VHDL able to read in 16 bit data, or should I give up now?


    You can read a byte at the time and stuff them into a 16-bit word. Not
    very elegant and not very portable, but...

    variable byte : character;
    variable bin16 : natural;

    read(img_file, byte);
    bin16 := character'pos(byte);
    read(img_file, byte);
    bin16 := bin16 + (256 * character'pos(byte)); -- little endian
    return std_logic_vector(to_unsigned(bin16, 16));

    Petter
    --
    A: Because it messes up the order in which people normally read text.
    Q: Why is top-posting such a bad thing?
    A: Top-posting.
    Q: What is the most annoying thing on usenet and in e-mail?
    Petter Gustad, Aug 4, 2009
    #5
  6. Fredxx

    Fredxx Guest

    "Petter Gustad" <> wrote in message
    news:...
    > "Fredxx" <> writes:
    >
    >> But as is expected the 'character' is only 8 bits and only populates the
    >> lower 8 bits of data_word.
    >>
    >> Is VHDL able to read in 16 bit data, or should I give up now?

    >
    > You can read a byte at the time and stuff them into a 16-bit word. Not
    > very elegant and not very portable, but...
    >
    > variable byte : character;
    > variable bin16 : natural;
    >
    > read(img_file, byte);
    > bin16 := character'pos(byte);
    > read(img_file, byte);
    > bin16 := bin16 + (256 * character'pos(byte)); -- little endian
    > return std_logic_vector(to_unsigned(bin16, 16));
    >


    That's what I've ended up doing, in fact using the -ve going clock to take
    one byte and +ve clock the other byte.

    I just wondered if there was a more elegant method :)
    Fredxx, Aug 4, 2009
    #6
  7. Fredxx

    Fredxx Guest

    "Mike Treseler" <> wrote in message
    news:...
    > Fredxx wrote:
    >
    >> I did note your dislike of textio, however this is data from another
    >> program, so it wouldn't be straightforward to place in a constant array.
    >>
    >> Unless of course you know of any utilities which convert a binary file
    >> simply into a constant array VHDL file?

    >
    > If it were a one-time conversion, I would use an emacs macro.
    > Otherwise, a python script.
    >
    > Here a binary file example without textio:
    > http://mysite.verizon.net/miketreseler/char_file.vhd
    >
    > Good luck.
    >


    Many thanks.

    In essence I'm taking an intermediate output from a C++ program and
    comparing outputs from a VHDL simulation with the output from the same C++
    program. When it comes to numerical algorithms I find it easier to prove
    and debug a program in C or similar and then transcribe into VHDL for a
    hardware implementation.
    Fredxx, Aug 4, 2009
    #7
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