sensitivity list

Discussion in 'VHDL' started by Eqbal, Nov 18, 2003.

  1. Eqbal

    Eqbal Guest

    Can you have two process in an architecture sensitive to the same
    signal? (e.g. clock).

    Thanks.
     
    Eqbal, Nov 18, 2003
    #1
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  2. Eqbal wrote:
    > Can you have two process in an architecture sensitive to the same
    > signal? (e.g. clock).


    Yes. As many as you want.
    You can even add "reset" to the lists.

    -- Mike Treseler
     
    Mike Treseler, Nov 18, 2003
    #2
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  3. Eqbal

    Herwig Dietl Guest

    Eqbal wrote:
    > Can you have two process in an architecture sensitive to the same
    > signal? (e.g. clock).
    >
    > Thanks.


    yes you can.
    a lot of processes can be sensitive to the same signal.


    --
    Dietl Herwig

    I am Murphy of Borg: Anything that can be assimilated will be.
     
    Herwig Dietl, Nov 18, 2003
    #3
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