Sequential Circuits power up Reset

Discussion in 'VHDL' started by john, Jun 30, 2005.

  1. john

    john Guest

    Hello,

    I am having a problem with the power up "Reset" of the 19-bit counter..
    I want it to be "0000 hex", whenever, I power up my system.
    It initializes it self to "0000hex" sometimes and sometimes it does not
    do that. I have attached the code too. Please advice!

    Thanks
    Regards
    John.


    Address_bus<= sec_counter;
    sec_counter<= "0000000000000000000" When Reset_A ='1' Else sec_counter
    + 1 When inc 'Event And inc= '1' And sec_stop ='0';

    sec_stop <= '1' When sec_counter(18)='0'and sec_counter(17)='0'and
    sec_counter(16)='0' and
    sec_counter(15)='0'and sec_counter(14)='0'and sec_counter(13)='1' and
    sec_counter(12)='0'and sec_counter(11)='0'and sec_counter(10)='1' and

    sec_counter(9)= '0'and sec_counter(8)= '0'and sec_counter(7)='0' and

    sec_counter(6) ='0'and sec_counter(5)= '1'and sec_counter(4)='0' and

    sec_counter(3)= '0'and sec_counter(2)= '0'and sec_counter(1)='0' and
    sec_counter(0)= '0'
    Else
    '0';
    Process(State)

    Begin

    Case State is

    When E0 =>
    Reset_A <= '1';
    nextstate<= E1;

    When E1 =>
    Reset_A <= '0';
    nextstate<= E1;

    When Others =>
    Reset_A <= '1';
    nextstate<= E0;


    End Case;
    End Process;
    ----

    Process (State2)
    Begin

    Case State2 is


    When G0=>
    inc<='0';
    Data_Bus ( 13 downto 8) <= USB_Data ( 5 downto 0 );
    UBL <='0';
    LBL <='0';
    nextstate2 <=G1;

    When G1 =>
    inc <='0';
    Data_Bus ( 7 downto 0) <= USB_Data ( 7 downto 0 );
    UBL <='0';
    LBL <='0';

    nextstate2<=G2;

    When G2 =>
    inc <='1';
    Data_Bus ( 13 downto 8) <= USB_Data ( 5 downto 0 );
    UBL <='0';
    LBL <='0';

    nextstate2 <=G3;

    When G3 =>
    inc <='0';
    Data_Bus ( 7 downto 0) <= USB_Data ( 7 downto 0 );
    UBL <='0';
    LBL <='0';

    nextstate2 <=G2;
    When others =>
    nextstate2 <=G0;

    End case;
    End Process;

    ----

    Process (USB_CLK )
    Begin

    If (USB_CLK 'Event And USB_CLK = '0')Then

    If ( sec_stop= '0') Then

    State2 <= nextstate2;
    State <= nextstate;

    Else
    State2 <= G0;
    State <= E0;

    End If;

    End If;

    End Process;
     
    john, Jun 30, 2005
    #1
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  2. On 30 Jun 2005 09:02:25 -0700, "john" <> wrote:


    >I am having a problem with the power up "Reset" of the 19-bit counter..
    >I want it to be "0000 hex", whenever, I power up my system.
    >It initializes it self to "0000hex" sometimes and sometimes it does not
    >do that. I have attached the code too. Please advice!


    Are you talking about behaviour of the real hardware, or simulation?
    Have you simulated? Have you run synthesis? Are you sure that signal
    Reset_A is indeed asserted at startup?

    Did they teach you about.....

    ....synthesisable clocked processes?

    >sec_counter<= "0000000000000000000" When Reset_A ='1' Else sec_counter
    > + 1 When inc 'Event And inc= '1' And sec_stop ='0';


    .... numeric comparison in the numeric_std package?

    >sec_stop <= '1' When sec_counter(18)='0'and sec_counter(17)='0'and
    >sec_counter(16)='0' and
    >sec_counter(15)='0'and sec_counter(14)='0'and sec_counter(13)='1' and
    >sec_counter(12)='0'and sec_counter(11)='0'and sec_counter(10)='1' and
    >
    >sec_counter(9)= '0'and sec_counter(8)= '0'and sec_counter(7)='0' and
    >
    >sec_counter(6) ='0'and sec_counter(5)= '1'and sec_counter(4)='0' and
    >
    >sec_counter(3)= '0'and sec_counter(2)= '0'and sec_counter(1)='0' and
    >sec_counter(0)= '0'
    >Else
    > '0';

    --
    Jonathan Bromley, Consultant

    DOULOS - Developing Design Know-how
    VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services

    Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
    Tel: +44 (0)1425 471223 mail:
    Fax: +44 (0)1425 471573 Web: http://www.doulos.com

    The contents of this message may contain personal views which
    are not the views of Doulos Ltd., unless specifically stated.
     
    Jonathan Bromley, Jun 30, 2005
    #2
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  3. john

    john Guest

    Hello,
    I am talking about real hardware behaviour.

    Thanks
    Regards
    John

    john wrote:
    > Hello,
    >
    > I am having a problem with the power up "Reset" of the 19-bit counter..
    > I want it to be "0000 hex", whenever, I power up my system.
    > It initializes it self to "0000hex" sometimes and sometimes it does not
    > do that. I have attached the code too. Please advice!
    >
    > Thanks
    > Regards
    > John.
    >
    >
    > Address_bus<= sec_counter;
    > sec_counter<= "0000000000000000000" When Reset_A ='1' Else sec_counter
    > + 1 When inc 'Event And inc= '1' And sec_stop ='0';
    >
    > sec_stop <= '1' When sec_counter(18)='0'and sec_counter(17)='0'and
    > sec_counter(16)='0' and
    > sec_counter(15)='0'and sec_counter(14)='0'and sec_counter(13)='1' and
    > sec_counter(12)='0'and sec_counter(11)='0'and sec_counter(10)='1' and
    >
    > sec_counter(9)= '0'and sec_counter(8)= '0'and sec_counter(7)='0' and
    >
    > sec_counter(6) ='0'and sec_counter(5)= '1'and sec_counter(4)='0' and
    >
    > sec_counter(3)= '0'and sec_counter(2)= '0'and sec_counter(1)='0' and
    > sec_counter(0)= '0'
    > Else
    > '0';
    > Process(State)
    >
    > Begin
    >
    > Case State is
    >
    > When E0 =>
    > Reset_A <= '1';
    > nextstate<= E1;
    >
    > When E1 =>
    > Reset_A <= '0';
    > nextstate<= E1;
    >
    > When Others =>
    > Reset_A <= '1';
    > nextstate<= E0;
    >
    >
    > End Case;
    > End Process;
    > ----
    >
    > Process (State2)
    > Begin
    >
    > Case State2 is
    >
    >
    > When G0=>
    > inc<='0';
    > Data_Bus ( 13 downto 8) <= USB_Data ( 5 downto 0 );
    > UBL <='0';
    > LBL <='0';
    > nextstate2 <=G1;
    >
    > When G1 =>
    > inc <='0';
    > Data_Bus ( 7 downto 0) <= USB_Data ( 7 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2<=G2;
    >
    > When G2 =>
    > inc <='1';
    > Data_Bus ( 13 downto 8) <= USB_Data ( 5 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2 <=G3;
    >
    > When G3 =>
    > inc <='0';
    > Data_Bus ( 7 downto 0) <= USB_Data ( 7 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2 <=G2;
    > When others =>
    > nextstate2 <=G0;
    >
    > End case;
    > End Process;
    >
    > ----
    >
    > Process (USB_CLK )
    > Begin
    >
    > If (USB_CLK 'Event And USB_CLK = '0')Then
    >
    > If ( sec_stop= '0') Then
    >
    > State2 <= nextstate2;
    > State <= nextstate;
    >
    > Else
    > State2 <= G0;
    > State <= E0;
    >
    > End If;
    >
    > End If;
    >
    > End Process;
     
    john, Jun 30, 2005
    #3
  4. john

    john Guest

    Hi,

    The problem is that USB_CLK is not present at the time of the power up.
    The USBCLK activates when the user wishes it to activate. So, I was
    relying on the power up reset option on the CPLD, but I think its not
    working for me!

    Thanks
    Regards
    john
    john wrote:
    > Hello,
    >
    > I am having a problem with the power up "Reset" of the 19-bit counter..
    > I want it to be "0000 hex", whenever, I power up my system.
    > It initializes it self to "0000hex" sometimes and sometimes it does not
    > do that. I have attached the code too. Please advice!
    >
    > Thanks
    > Regards
    > John.
    >
    >
    > Address_bus<= sec_counter;
    > sec_counter<= "0000000000000000000" When Reset_A ='1' Else sec_counter
    > + 1 When inc 'Event And inc= '1' And sec_stop ='0';
    >
    > sec_stop <= '1' When sec_counter(18)='0'and sec_counter(17)='0'and
    > sec_counter(16)='0' and
    > sec_counter(15)='0'and sec_counter(14)='0'and sec_counter(13)='1' and
    > sec_counter(12)='0'and sec_counter(11)='0'and sec_counter(10)='1' and
    >
    > sec_counter(9)= '0'and sec_counter(8)= '0'and sec_counter(7)='0' and
    >
    > sec_counter(6) ='0'and sec_counter(5)= '1'and sec_counter(4)='0' and
    >
    > sec_counter(3)= '0'and sec_counter(2)= '0'and sec_counter(1)='0' and
    > sec_counter(0)= '0'
    > Else
    > '0';
    > Process(State)
    >
    > Begin
    >
    > Case State is
    >
    > When E0 =>
    > Reset_A <= '1';
    > nextstate<= E1;
    >
    > When E1 =>
    > Reset_A <= '0';
    > nextstate<= E1;
    >
    > When Others =>
    > Reset_A <= '1';
    > nextstate<= E0;
    >
    >
    > End Case;
    > End Process;
    > ----
    >
    > Process (State2)
    > Begin
    >
    > Case State2 is
    >
    >
    > When G0=>
    > inc<='0';
    > Data_Bus ( 13 downto 8) <= USB_Data ( 5 downto 0 );
    > UBL <='0';
    > LBL <='0';
    > nextstate2 <=G1;
    >
    > When G1 =>
    > inc <='0';
    > Data_Bus ( 7 downto 0) <= USB_Data ( 7 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2<=G2;
    >
    > When G2 =>
    > inc <='1';
    > Data_Bus ( 13 downto 8) <= USB_Data ( 5 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2 <=G3;
    >
    > When G3 =>
    > inc <='0';
    > Data_Bus ( 7 downto 0) <= USB_Data ( 7 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2 <=G2;
    > When others =>
    > nextstate2 <=G0;
    >
    > End case;
    > End Process;
    >
    > ----
    >
    > Process (USB_CLK )
    > Begin
    >
    > If (USB_CLK 'Event And USB_CLK = '0')Then
    >
    > If ( sec_stop= '0') Then
    >
    > State2 <= nextstate2;
    > State <= nextstate;
    >
    > Else
    > State2 <= G0;
    > State <= E0;
    >
    > End If;
    >
    > End If;
    >
    > End Process;
     
    john, Jun 30, 2005
    #4
  5. john

    Andy Peters Guest

    john wrote:
    > Hi,
    >
    > The problem is that USB_CLK is not present at the time of the power up.
    > The USBCLK activates when the user wishes it to activate. So, I was
    > relying on the power up reset option on the CPLD, but I think its not
    > working for me!


    What Jonathan said. Your code is a nightmare, and would never pass a
    real code review.

    -a
     
    Andy Peters, Jun 30, 2005
    #5
  6. john

    john Guest

    Hello,

    Thank you very much for your reply! I tested most of the code with the
    real hardware. The reason is that I use Prochip ( Atmel) software for
    their chips and their simulation software sucks.
    If I add additional clock to the circuitry and reset it on that clock,
    will it solve the problem. Now, the CPLD is working on the USB_CLK
    which is not activated when the CPLD gets powered up but a continuous
    clock at the power up will reset the CPLD. Would you please advice me!

    Thanks
    Regards
    John


    john wrote:
    > Hello,
    >
    > I am having a problem with the power up "Reset" of the 19-bit counter..
    > I want it to be "0000 hex", whenever, I power up my system.
    > It initializes it self to "0000hex" sometimes and sometimes it does not
    > do that. I have attached the code too. Please advice!
    >
    > Thanks
    > Regards
    > John.
    >
    >
    > Address_bus<= sec_counter;
    > sec_counter<= "0000000000000000000" When Reset_A ='1' Else sec_counter
    > + 1 When inc 'Event And inc= '1' And sec_stop ='0';
    >
    > sec_stop <= '1' When sec_counter(18)='0'and sec_counter(17)='0'and
    > sec_counter(16)='0' and
    > sec_counter(15)='0'and sec_counter(14)='0'and sec_counter(13)='1' and
    > sec_counter(12)='0'and sec_counter(11)='0'and sec_counter(10)='1' and
    >
    > sec_counter(9)= '0'and sec_counter(8)= '0'and sec_counter(7)='0' and
    >
    > sec_counter(6) ='0'and sec_counter(5)= '1'and sec_counter(4)='0' and
    >
    > sec_counter(3)= '0'and sec_counter(2)= '0'and sec_counter(1)='0' and
    > sec_counter(0)= '0'
    > Else
    > '0';
    > Process(State)
    >
    > Begin
    >
    > Case State is
    >
    > When E0 =>
    > Reset_A <= '1';
    > nextstate<= E1;
    >
    > When E1 =>
    > Reset_A <= '0';
    > nextstate<= E1;
    >
    > When Others =>
    > Reset_A <= '1';
    > nextstate<= E0;
    >
    >
    > End Case;
    > End Process;
    > ----
    >
    > Process (State2)
    > Begin
    >
    > Case State2 is
    >
    >
    > When G0=>
    > inc<='0';
    > Data_Bus ( 13 downto 8) <= USB_Data ( 5 downto 0 );
    > UBL <='0';
    > LBL <='0';
    > nextstate2 <=G1;
    >
    > When G1 =>
    > inc <='0';
    > Data_Bus ( 7 downto 0) <= USB_Data ( 7 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2<=G2;
    >
    > When G2 =>
    > inc <='1';
    > Data_Bus ( 13 downto 8) <= USB_Data ( 5 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2 <=G3;
    >
    > When G3 =>
    > inc <='0';
    > Data_Bus ( 7 downto 0) <= USB_Data ( 7 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2 <=G2;
    > When others =>
    > nextstate2 <=G0;
    >
    > End case;
    > End Process;
    >
    > ----
    >
    > Process (USB_CLK )
    > Begin
    >
    > If (USB_CLK 'Event And USB_CLK = '0')Then
    >
    > If ( sec_stop= '0') Then
    >
    > State2 <= nextstate2;
    > State <= nextstate;
    >
    > Else
    > State2 <= G0;
    > State <= E0;
    >
    > End If;
    >
    > End If;
    >
    > End Process;
     
    john, Jul 1, 2005
    #6
  7. On 1 Jul 2005 08:22:32 -0700, "john" <> wrote:

    >Thank you very much for your reply! I tested most of the code with the
    >real hardware. The reason is that I use Prochip ( Atmel) software for
    >their chips and their simulation software sucks.


    No way can it suck as much as the idea of implementing stuff
    without doing some functional simulation first. For small
    designs you can use the free version of ModelSim that comes
    with Xilinx WebPack, or you can use a free or nearly free
    VHDL simulator such as Simili.

    >> I am having a problem with the power up "Reset" of the 19-bit counter..


    Now I read your code again, I recognise that the counter's reset
    signal Reset_A is not external, but is generated by a state machine;
    and this state machine has no power-up reset. So there is no
    hope of your circuit ever working reliably. Add an asynchronous
    reset to your state registers, and be sure that it is asserted
    at startup.

    You haven't answered my earlier questions: why, oh why, are
    you using that disgusting coding style for state machines and
    for clocked processes? People who write working VHDL usually
    code their synthesisable clocked processes thus:

    process (clock, reset)
    begin
    if reset = '1' then
    registers <= reset_values;
    elsif rising_edge(clock) then
    registers <= next_state_value_of_registers;
    end if;
    end process;

    You also have some nasty clock-domain-crossing issues because
    an output from the state machine is used as an asynchronous reset
    to the counter. Only you can decide whether that's OK in your
    specific situation, but from a best-practice point of view it stinks.
    --
    Jonathan Bromley, Consultant

    DOULOS - Developing Design Know-how
    VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services

    Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
    Tel: +44 (0)1425 471223 mail:
    Fax: +44 (0)1425 471573 Web: http://www.doulos.com

    The contents of this message may contain personal views which
    are not the views of Doulos Ltd., unless specifically stated.
     
    Jonathan Bromley, Jul 1, 2005
    #7
  8. john

    john Guest

    Hello,

    yes, you are correct. I do not have an External Reset option or pin. I
    can not have it and thats why I am trying to reset it with a state
    machine running on the USB_CLK which coming from the computer and its
    not there when I powerup my CPLD, there is no microprocessor or
    anything else which provides my CPLD an external powerup RESET. So, I
    was thinking that if I have another state machine working on a some
    other continuous clock source which is present at the time of the
    powerup of the CPLD can RESET the state machine working on USB_CLK.
    Please advice me !
    Regards
    John


    john wrote:
    > Hello,
    >
    > I am having a problem with the power up "Reset" of the 19-bit counter..
    > I want it to be "0000 hex", whenever, I power up my system.
    > It initializes it self to "0000hex" sometimes and sometimes it does not
    > do that. I have attached the code too. Please advice!
    >
    > Thanks
    > Regards
    > John.
    >
    >
    > Address_bus<= sec_counter;
    > sec_counter<= "0000000000000000000" When Reset_A ='1' Else sec_counter
    > + 1 When inc 'Event And inc= '1' And sec_stop ='0';
    >
    > sec_stop <= '1' When sec_counter(18)='0'and sec_counter(17)='0'and
    > sec_counter(16)='0' and
    > sec_counter(15)='0'and sec_counter(14)='0'and sec_counter(13)='1' and
    > sec_counter(12)='0'and sec_counter(11)='0'and sec_counter(10)='1' and
    >
    > sec_counter(9)= '0'and sec_counter(8)= '0'and sec_counter(7)='0' and
    >
    > sec_counter(6) ='0'and sec_counter(5)= '1'and sec_counter(4)='0' and
    >
    > sec_counter(3)= '0'and sec_counter(2)= '0'and sec_counter(1)='0' and
    > sec_counter(0)= '0'
    > Else
    > '0';
    > Process(State)
    >
    > Begin
    >
    > Case State is
    >
    > When E0 =>
    > Reset_A <= '1';
    > nextstate<= E1;
    >
    > When E1 =>
    > Reset_A <= '0';
    > nextstate<= E1;
    >
    > When Others =>
    > Reset_A <= '1';
    > nextstate<= E0;
    >
    >
    > End Case;
    > End Process;
    > ----
    >
    > Process (State2)
    > Begin
    >
    > Case State2 is
    >
    >
    > When G0=>
    > inc<='0';
    > Data_Bus ( 13 downto 8) <= USB_Data ( 5 downto 0 );
    > UBL <='0';
    > LBL <='0';
    > nextstate2 <=G1;
    >
    > When G1 =>
    > inc <='0';
    > Data_Bus ( 7 downto 0) <= USB_Data ( 7 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2<=G2;
    >
    > When G2 =>
    > inc <='1';
    > Data_Bus ( 13 downto 8) <= USB_Data ( 5 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2 <=G3;
    >
    > When G3 =>
    > inc <='0';
    > Data_Bus ( 7 downto 0) <= USB_Data ( 7 downto 0 );
    > UBL <='0';
    > LBL <='0';
    >
    > nextstate2 <=G2;
    > When others =>
    > nextstate2 <=G0;
    >
    > End case;
    > End Process;
    >
    > ----
    >
    > Process (USB_CLK )
    > Begin
    >
    > If (USB_CLK 'Event And USB_CLK = '0')Then
    >
    > If ( sec_stop= '0') Then
    >
    > State2 <= nextstate2;
    > State <= nextstate;
    >
    > Else
    > State2 <= G0;
    > State <= E0;
    >
    > End If;
    >
    > End If;
    >
    > End Process;
     
    john, Jul 1, 2005
    #8
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