Silly question....

[Don]

Sorry for this silly question, but the issue bugs me a little.
I have the logical expression:

/A*/B + A*B

( / means not...)

could'nt this expression be reducved more????

Don

 

[Allan Herriman]

Sorry for this silly question, but the issue bugs me a little.
I have the logical expression:

/A*/B + A*B

( / means not...)

could'nt this expression be reducved more????

I translate this to VHDL (it *is* comp.lang.vhdl, after all) as

(not a and not b) or (a and b)

Is this what you meant?

It is equivalent to (a xnor b)

If your target hardware is lookup table based, then this already
produces the smallest amount of logic (1 LUT).
If your target hardware has an XNOR (or XOR) cell, it will probably be
smaller than the separate ANDs, OR and NOTs.
If you are making this out of transistors, there are some tricks you
can pull. I can get it down to 8 transistors after a few seconds
thought (two inverters and two transmission gates).

Was this homework?

Regards,
Allan.

 

[Don]

I translate this to VHDL (it *is* comp.lang.vhdl, after all) as

(not a and not b) or (a and b)

Is this what you meant?

It is equivalent to (a xnor b)

If your target hardware is lookup table based, then this already
produces the smallest amount of logic (1 LUT).
If your target hardware has an XNOR (or XOR) cell, it will probably be
smaller than the separate ANDs, OR and NOTs.
If you are making this out of transistors, there are some tricks you
can pull. I can get it down to 8 transistors after a few seconds
thought (two inverters and two transmission gates).

Was this homework?

Regards,
Allan.

Thank you very much.

Don