SPI serial output counter or latch?

Discussion in 'VHDL' started by bob, Feb 15, 2005.

  1. bob

    bob Guest

    Hello I have been writing some VHDL code for my CoolRunner CPLD.
    I am a beginner.
    I have made a project that counts events and sends them to a 16-bit
    counter. Currently I just look at the binary output.

    I would like to latch the counts and serially shift the counts out as
    SPI
    In hardware I would use a latching shift register like a 74HCT165 and
    would use /PL as a chip select and tie CP to SPI_CLK and Q7 to a
    buffer then to SPI_MISO Nothing fancy.

    So I guess I am asking if anybody has some VHDL code for a parallel in
    SPI out latch, or a SPI output counter.

    Any help is appreciated.
    Martin
     
    bob, Feb 15, 2005
    #1
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  2. bob wrote:
    > Hello I have been writing some VHDL code for my CoolRunner CPLD.
    > I am a beginner.
    > I have made a project that counts events and sends them to a 16-bit
    > counter. Currently I just look at the binary output.
    >
    > I would like to latch the counts and serially shift the counts out as
    > SPI
    > In hardware I would use a latching shift register like a 74HCT165 and
    > would use /PL as a chip select and tie CP to SPI_CLK and Q7 to a
    > buffer then to SPI_MISO Nothing fancy.
    >
    > So I guess I am asking if anybody has some VHDL code for a parallel in
    > SPI out latch, or a SPI output counter.
    >
    > Any help is appreciated.


    Check out <http://www.opencores.org/projects.cgi/web/spi/overview>

    This is probably more complex than you want/need but it should give you
    ideas.
    --
    Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
    Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
    Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com
     
    Tim Hubberstey, Feb 15, 2005
    #2
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