State Machine Approaches - A Revisit

[Calvin]

I am aware of three main styles for state machine coding: Medvedev,
Moore and Mealy. Recently, one of my coworkers introduced a "hybrid"
one as follows:

p_reg: process(rst, clk)
begin
if rst = '0' then
current_state <= st_idle;
current_output <= cmb_idle;
elsif rising_edge(clk) then
current_state <= next_state;
current_output <= next_output;
end if;
end process p_reg;

p_cmb: process(current_state, data, stat)
case current_state is
when st_idle =>
if data = "1001" then
next_state <= st_start;
next_output <= stat(0) and not stat(1);
elsif ...
...
...
end if;
when st_start =>
...
when others =>
...
end case;
end process;

to_output_port <= current_output;

He said this is the best approach for state machine coding.
I truly appreciate any comments as well as pros/cons for this approach.

Calvin

 

[Ralf Hildebrandt]

I am aware of three main styles for state machine coding: Medvedev,
Moore and Mealy. Recently, one of my coworkers introduced a "hybrid"
one as follows:

p_reg: process(rst, clk)
begin
if rst = '0' then
current_state <= st_idle;
current_output <= cmb_idle;
elsif rising_edge(clk) then
current_state <= next_state;
current_output <= next_output;
end if;
end process p_reg;

-> A state machine with buffered outputs

He said this is the best approach for state machine coding.
I truly appreciate any comments as well as pros/cons for this approach.

Somebody here in the newsgroup once stated: "Forget Mealy-, Moore- and
other types of state machines." I agree with this and suggest: Use any
type of output generation, that is suitable for your special purpose.

* If you need buffered (hazard-free) outputs, use flipflops.
* If you don't need hazard-free outputs, you don't need buffers and
therefore the outputs may be generated from pure combinational logic.
* If your output depends on the value of an input - use it. If you need
input buffers to make the input hazard-free - use them.

In general: A FSM and their output signals are nothing more than a bunch
of combinational logic and some flipflops. For every flipflop you have
to ensure, that setup- and hold-times are not violated and for every
output you have to decide, if it must be hazard-free or not.

Ralf

 

[Mike Treseler]

Ralf Hildebrandt wrote:

Somebody here in the newsgroup once stated: "Forget Mealy-, Moore- and
other types of state machines." I agree with this and suggest: Use any
type of output generation, that is suitable for your special purpose.

Indeed. Synthesis has been done.
Spend your time describing and simulating your design.

-- Mike Treseler