State machine - Vending machine - strange behaviour

Discussion in 'VHDL' started by fenster, Dec 20, 2011.

  1. fenster

    fenster

    Joined:
    Dec 17, 2011
    Messages:
    2
    Hello,

    I'm trying to create vending machine in VHDL. It should has two kinds of products and remember theirs price and amount. My vending machine allows only tokens. When my machine is in state - payment - it starts to loop(variable vtokens is growing), ignoring conditional statement. What is wrong with my code?

    Code:
        PROCESS (clock,reset)
        BEGIN
            IF (reset='1') THEN
                fstate <= init_towar1;
            ELSIF (clock'event and clock = '1') THEN
                fstate <= reg_fstate;
            END IF;
        END PROCESS;
    
        PROCESS (fstate)
    			variable vprice1 : integer range 1 to 7;
    			variable vamount1 : integer range 0 to 15;
    			variable vprice2 : integer range 1 to 7;
    			variable vamount2 : integer range 0 to 15;
    			variable vprice : integer range 1 to 7;
    			variable vamount : integer range 0 to 15;
    			variable vtokens : integer range 0 to 7;
    			variable vselection: integer range 0 to 2;
        BEGIN
    
            CASE fstate IS
    				.
    				.
    				.
                WHEN payment =>
                    IF ((IN_resign = '1')) THEN
    							reg_fstate <= return;
                    ELSIF ((IN_tokens = '1')) THEN
                        	vtokens := vtokens+1;
                        IF ((vtokens < vprice)) THEN
    								reg_fstate <= payment;
    					ELSIF (vtokens = vprice) THEN
    								reg_fstate <= paid;
    					ELSE
    								reg_fstate <= payment;
    					END IF;		
                    ELSE
                        reg_fstate <= payment;
                    END IF;
    			.
    			.
    			.
        END PROCESS;
    fenster, Dec 20, 2011
    #1
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  2. fenster

    jeppe

    Joined:
    Mar 10, 2008
    Messages:
    348
    Location:
    Denmark
    PROCESS (fstate, IN_resign, .....)

    You need to have all input signals in the sensivitylist ... in order to get the correct combinatorial logic.
    jeppe, Dec 21, 2011
    #2
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  3. fenster

    fenster

    Joined:
    Dec 17, 2011
    Messages:
    2
    Thanks for reply, but addition inputs to sensitivity list doesn't solve the problem.
    fenster, Dec 21, 2011
    #3
  4. fenster

    jeppe

    Joined:
    Mar 10, 2008
    Messages:
    348
    Location:
    Denmark
    BEGIN

    reg_fstate <= fstate; <<<<< Default value for reg_state (important)

    CASE fstate IS

    Try this - could be the solution
    jeppe, Dec 23, 2011
    #4
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