std_logic_vector entry as hexadecimal : Different behaviors

Discussion in 'VHDL' started by Sylvain Munaut, Dec 20, 2004.

  1. Hello,


    To ease the entry of 32 bits constants, I'd like to be have things like :


    signal test : std_logic_vector(31 downto 0);

    test <= x"01234567";


    And that works fine in XSE & Symplify.

    But when I simulate on ModelSim, that doesn't work, I'm forced to used the
    heavier

    test <= to_stdlogicvector(x"01234567");


    But that doesn't work in XSE ! It says that to_stdlogicvector can mean
    two things in this context.


    Is there a way to make ModelSim understand the first notation ?



    Sylvain
     
    Sylvain Munaut, Dec 20, 2004
    #1
    1. Advertising

  2. Sylvain Munaut wrote:
    > Hello,
    >
    >
    > To ease the entry of 32 bits constants, I'd like to be have things like :
    >
    >
    > signal test : std_logic_vector(31 downto 0);
    >
    > test <= x"01234567";
    >
    >
    > And that works fine in XSE & Symplify.
    >
    > But when I simulate on ModelSim, that doesn't work, I'm forced to used the
    > heavier
    > test <= to_stdlogicvector(x"01234567");


    That's because you're using 1076-1987 mode. Use 1993 or 2002 instead
    (vcom -93 switch or -2002 switch, or in modelsim.ini).

    >
    > But that doesn't work in XSE ! It says that to_stdlogicvector can mean
    > two things in this context.


    That's because you're using 1076-1993 or 2002 here. Since the 1993
    standard bit_vectors (x"01234567") may also be used as std_logic_vector,
    so your expression is now ambiguous.

    > Is there a way to make ModelSim understand the first notation ?


    As said above, -93 or -2002 switch of vcom.

    Paul.
     
    Paul Uiterlinden, Dec 21, 2004
    #2
    1. Advertising

  3. Hello

    >> To ease the entry of 32 bits constants, I'd like to be have things like :
    >>
    >>
    >> signal test : std_logic_vector(31 downto 0);
    >>
    >> test <= x"01234567";
    >>
    >>
    >> And that works fine in XSE & Symplify.
    >>
    >> But when I simulate on ModelSim, that doesn't work, I'm forced to used
    >> the
    >> heavier
    >> test <= to_stdlogicvector(x"01234567");

    >
    >
    > That's because you're using 1076-1987 mode. Use 1993 or 2002 instead
    > (vcom -93 switch or -2002 switch, or in modelsim.ini).
    >


    Thanks, the -93 works fine.
    ( -2002 doesn't exist in my version of modelsim )

    Sylvain
     
    Sylvain Munaut, Dec 22, 2004
    #3
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. VB Programmer
    Replies:
    3
    Views:
    380
    William F. Robertson, Jr.
    Jul 1, 2003
  2. Weng Tianxiang
    Replies:
    2
    Views:
    901
    Weng Tianxiang
    May 7, 2006
  3. Thomas Rouam
    Replies:
    6
    Views:
    1,190
  4. wejiv
    Replies:
    1
    Views:
    546
    Anthony Jones
    Aug 26, 2008
  5. Mark Kremers

    Behaviors in Behaviors

    Mark Kremers, Jul 31, 2003, in forum: Javascript
    Replies:
    0
    Views:
    128
    Mark Kremers
    Jul 31, 2003
Loading...

Share This Page