Sting Signal into Vcd file

Discussion in 'VHDL' started by littlefrog, Nov 15, 2012.

  1. littlefrog

    littlefrog

    Joined:
    Oct 17, 2012
    Messages:
    2
    Hi
    I'm dumping signal which are declared as string, but i can't find these signals in the dump file.
    Can anyone tell me why this happens and how to over this.

    Thanks
    Paolo
    littlefrog, Nov 15, 2012
    #1
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