Strange input arrival times?

[Mike]

I have the following line inside one of my processes:

if ADDR_BUS(31 downto 6) = DEVICE_ADDRESS(31 downto 6) and DATA_BUS =
DEVICE_DATA then

When I synthesize my code with ISE, it reports:

Minimum input arrival time before clock: 6.568ns


When I change the line to:

if ADDR_BUS(31 downto 6) = DEVICE_ADDRESS(31 downto 6) then

The synthesis reports:

Minimum input arrival time before clock: 6.971ns


So how come the second code example has a higher input arrival time, than
the first code example? Surely the second example needs to do less than the
first example, which I would have thought would reduce the input arrival
time.

Can anyone shed any light on this?

Thanks.