Sub-bit transition state?

[Robert Winsor]

I am a student, new to CPLD design, and I am working with the Xilinx
Webpack ISE software.

Does anyone know the proper syntax, if possible, to have just one
particular bit of a vector determine a state transition within the State
Machine editor?

I know how to write the code to do this, but want to know how to do it
using the State Machine editor, for reasons pertaining to updating the
system design.

In other words, lets say I have a counter, 8 bits wide, but I want a
particular state executed every time the third bit is a "1", and another
state executed when it is a zero. I can't seem to find the syntax to
enter into the transition statement to get the software to allow it.

Also, being able to do this with groups of bits within a much larger
vector would be very helpful (ie using three neighboring bits nested
within a 24 bit counter to control a few state transitions).

Thanks for any help or advice, even if it might be directing me toward a
more suitable newsgroup for this question!

Cheers,
Robert Winsor

 

[Robert Winsor]

Ignore this request. I thought I knew how to do this, and it turns out
I was doing it correctly, but Windoze strikes again.
I rebooted and the syntax that previously created errors now works great.

Cheers,
Robert Winsor