switch design on fpga

H

hema

hiiii,

In case of designing the switch controller on FPGA ,how to resolve the
contention when all the input buffers(FIFO) try out for the same output
FIFO????

regards,
hema.
 
K

KJ

hema said:
hiiii,

In case of designing the switch controller on FPGA ,how to resolve the
contention when all the input buffers(FIFO) try out for the same output
FIFO????

An arbitrator.

KJ
 

Ask a Question

Want to reply to this thread or ask your own question?

You'll need to choose a username for the site, which only take a couple of moments. After that, you can post your question and our members will help you out.

Ask a Question

Members online

No members online now.

Forum statistics

Threads
473,769
Messages
2,569,579
Members
45,053
Latest member
BrodieSola

Latest Threads

Top