SystemC and TLM

Discussion in 'VHDL' started by confusedpp@gmail.com, May 17, 2007.

  1. Guest

    Dear all,
    Thank you for your patience...
    I have looked up on the web and read quite a few articles but I am
    still very confused re SystemC and TLM.
    My understanding is that TLM allows you to model at an appropriate
    level for what you want to do (communication and functional are
    separated, timed and untimed detail for either possible).
    However, I don't understand where TLMs go.
    Say I have an architectural model in software - call it arch. I have
    a hardware RTL model for an FPGA.
    I want arch to call up hardware. Is the TLM used between arch and
    hardware? When the person's developing arch, is hardware replaced by
    its equivalent TLM?

    And, more fundamentally - is TLM just an abstract idea? I mean, if we
    have to create another model (now called a TLM), why give it another
    special name? Isn't it just another block of SystemC?

    I hope that you can help in some way, even if only to refer to some
    online explanations or suggest another newsgroup.

    regards,
    confused
    , May 17, 2007
    #1
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