The VHDL coding question

Discussion in 'VHDL' started by LiamChang, Apr 20, 2009.

  1. LiamChang

    LiamChang

    Joined:
    Apr 20, 2009
    Messages:
    1
    Hi
    I am an verilog engineer in Taiwan IC design House.
    I got a IP written by VHDL form Qualcomm

    But, I dont understand the meaning about below declaration
    First Question:
    " B : IN vector_of_std_logic_vector8(0 TO 63); -- ufix8_En8 [64] "
    the vector_of_stb_logic8(0 TO 63) means ??
    What's the different form STD_LOGIC_VECTOR (63 downto 0) ??

    Can I replace them with STD_LOGIC_VECTOR..... declaration ??

    Thanks very much !!
     
    Last edited: Apr 21, 2009
    LiamChang, Apr 20, 2009
    #1
    1. Advertising

  2. LiamChang

    JohnDuq

    Joined:
    Dec 9, 2008
    Messages:
    88
    In

    http://www.ece.uah.edu/~gaede/cpe526/vhdl_src/vital2.2b/prmtvs_p.vhd

    I see the following definitions:

    -- ----------------------------------------------------------------------------
    -- Type and Subtype Declarations
    -- ----------------------------------------------------------------------------
    -- ----------------------------------------------------------------------------
    -- All of these SUBTYPE declarations are defined in the VITAL_TIMING package
    -- but are repeated here for ease of readability. WARNING: Do Not Uncomment if
    -- you plan to USE both packages as this may render the SUBTYPE declarations
    -- invisible to the user due to mutual hiding.
    --
    -- SUBTYPE std_logic_vector2 IS std_logic_vector(1 DOWNTO 0);
    -- SUBTYPE std_logic_vector3 IS std_logic_vector(2 DOWNTO 0);
    -- SUBTYPE std_logic_vector4 IS std_logic_vector(3 DOWNTO 0);
    -- SUBTYPE std_logic_vector8 IS std_logic_vector(7 DOWNTO 0);
    -- ----------------------------------------------------------------------------

    This is ASIC specific code, so my belief is that ...vector8 is used to define registers on a byte-wide basis.

    You'll need to dig into the VITAL_TIMING package for more definition.

    John
     
    JohnDuq, Apr 20, 2009
    #2
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. Francisco Camarero

    VHDL Coding Guidelines

    Francisco Camarero, Jul 8, 2003, in forum: VHDL
    Replies:
    1
    Views:
    2,083
  2. senthil
    Replies:
    0
    Views:
    622
    senthil
    Nov 21, 2003
  3. calmar
    Replies:
    11
    Views:
    901
    calmar
    Feb 21, 2006
  4. afd
    Replies:
    1
    Views:
    8,363
    Colin Paul Gloster
    Mar 23, 2007
  5. Amal
    Replies:
    1
    Views:
    1,750
    vipinlal
    Mar 4, 2010
Loading...

Share This Page