I was after a TK simulation for a common 2-line LCD panel that you
might find on FPGA development boards or the like. I want to plug it
into a VHDL simulation. (I am not so much of a hack that I cant get my
LCD working, I just want a more comprehensive testbench)
Juan Carlos's link shows how you could make a display. The
trickier problem, though, is how to get the data out to your
Tk display. One useful possibility is to get the VHDL simulation to
write the data to a file - then the Tk program can poll the file
and read newly added text out of the end of it. Even better is
to use a pipe interface from VHDL to Tk, but it's tough to get
VHDL to open a pipe or a socket.
Our polar-plot demonstration
http://www.doulos.com/knowhow/tcltk/examples/constellation/
shows a nice way to connect a Tcl/Tk visualisation program to
the ModelSim simulator so that the display shows you the data
that's under the waveform window's cursor. But a 2-line LCD
has internal state information, so that might be more difficult.
And our script works only for ModelSim, although in principle
it could be adapted for any simulator with a Tk front-end.
Our favourite way to do this stuff is to use VHDL text output
to the standard output channel. You can then hook a Tk
program to this channel. Get your VHDL to write a special
prefix to any line of text that should go to the LCD. Then
the Tk script can use any line with this prefix to update
an LCD visualiser, and other text can be displayed on a Tk
text widget and/or echoed to a transcript file by Tk.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services
Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
Tel: +44 (0)1425 471223 mail:
[email protected]
Fax: +44 (0)1425 471573 Web:
http://www.doulos.com
The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
