Two different `architecture' implementations?

Discussion in 'VHDL' started by Merciadri Luca, Nov 1, 2010.

  1. -----BEGIN PGP SIGNED MESSAGE-----
    Hash: SHA1

    Hi,

    I generally write

    ==
    architecture my_arch of my_stuff is
    - -- signal, etc., declarations
    begin
    process
    - -- var declarations
    begin
    - -- code
    end process;
    end my_arch;
    ==

    but I saw lately, in VHDL Tutorial, by Peter J. Ashenden (Ashenden
    designs PTY., LTD., consultant), that he did it this way:

    ==
    architecture my_arch of my_stuff is
    - -- signal, etc., declarations
    begin
    process is
    begin
    end process;
    end architecture my_arch;
    ==

    There are two main differences between our approaches. The first is
    that he uses the `is' keyword after `process'. The second is that he
    writes `architecture' before the architecture's name, in the closing
    line of the architecture my_arch.

    Is there a reason to prefer one of the approaches to the other?

    Thanks.
    - --
    Merciadri Luca
    See http://www.student.montefiore.ulg.ac.be/~merciadri/
    - --

    You can fool all of the people some of the time, some of the people all of the time, but you can't fool all of the people all of the time. (Abraham Lincoln)
    -----BEGIN PGP SIGNATURE-----
    Version: GnuPG v1.4.9 (GNU/Linux)
    Comment: Processed by Mailcrypt 3.5.8 <http://mailcrypt.sourceforge.net/>

    iEYEARECAAYFAkzOwuwACgkQM0LLzLt8MhxR6ACfYQjriXTSFL//tixAmPpq8Nld
    JM0AoJ8C3yx/nc11jJi6vcM7tnSw5Agm
    =Qs9G
    -----END PGP SIGNATURE-----
    Merciadri Luca, Nov 1, 2010
    #1
    1. Advertising

  2. Merciadri Luca

    Andy Guest

    Both are optional. I prefer adding "is" after a process statement
    (after the sensitivity clause, if present), simply because it makes it
    read more like the other vhdl items that have their own declarative
    regions.

    I also prefer adding the "architecture" keyword after the end
    statement, before the name of the architecture, because most "end"
    statements have a keyword with them identifying what type of structure
    is being ended (end if, end loop, etc.)

    But it really boils down to personal preference. I don't mind a little
    extra typing for syntactic consistency.

    Andy
    Andy, Nov 1, 2010
    #2
    1. Advertising

  3. -----BEGIN PGP SIGNED MESSAGE-----
    Hash: SHA1

    Andy <> writes:

    > Both are optional. I prefer adding "is" after a process statement
    > (after the sensitivity clause, if present), simply because it makes it
    > read more like the other vhdl items that have their own declarative
    > regions.
    >
    > I also prefer adding the "architecture" keyword after the end
    > statement, before the name of the architecture, because most "end"
    > statements have a keyword with them identifying what type of structure
    > is being ended (end if, end loop, etc.)

    I agree with you on both points.

    > But it really boils down to personal preference. I don't mind a little
    > extra typing for syntactic consistency.

    You're right. I just thought there was some subtle difference on
    another point of view than aesthetic considerations, but apparently
    not. Thanks.

    - --
    Merciadri Luca
    See http://www.student.montefiore.ulg.ac.be/~merciadri/
    - --

    Luck is what happens when preparation meets opportunity. (Lucius Annaeus Seneca)
    -----BEGIN PGP SIGNATURE-----
    Version: GnuPG v1.4.9 (GNU/Linux)
    Comment: Processed by Mailcrypt 3.5.8 <http://mailcrypt.sourceforge.net/>

    iEYEARECAAYFAkzO1UwACgkQM0LLzLt8MhyazACfX8Qv9HfOhZJ1za2a0vOaMPhS
    VGwAnAon0L2ixNe9C0Qvn6Kt8ZyKBEdt
    =hTgf
    -----END PGP SIGNATURE-----
    Merciadri Luca, Nov 1, 2010
    #3
  4. Merciadri Luca

    backhus Guest

    On 1 Nov., 14:38, Merciadri Luca <>
    wrote:
    > -----BEGIN PGP SIGNED MESSAGE-----
    > Hash: SHA1
    >
    > Hi,
    >
    > I generally write
    >
    > ==
    > architecture my_arch of my_stuff is
    > - -- signal, etc., declarations
    > begin
    > process
    > - -- var declarations
    > begin
    > - -- code
    > end process;
    > end my_arch;
    > ==
    >
    > but I saw lately, in VHDL Tutorial, by Peter J. Ashenden (Ashenden
    > designs PTY., LTD., consultant), that he did it this way:
    >
    > ==
    > architecture my_arch of my_stuff is
    > - -- signal, etc., declarations
    > begin
    > process is
    > begin
    > end process;
    > end architecture my_arch;
    > ==
    >
    > There are two main differences between our approaches. The first is
    > that he uses the `is' keyword after `process'. The second is that he
    > writes `architecture' before the architecture's name, in the closing
    > line of the architecture my_arch.
    >
    > Is there a reason to prefer one of the approaches to the other?
    >
    > Thanks.
    > - --
    > Merciadri Luca
    > Seehttp://www.student.montefiore.ulg.ac.be/~merciadri/
    > - --
    >
    > You can fool all of the people some of the time, some of the people all of the time, but you can't fool all of the people all of the time. (Abraham Lincoln)
    > -----BEGIN PGP SIGNATURE-----
    > Version: GnuPG v1.4.9 (GNU/Linux)
    > Comment: Processed by Mailcrypt 3.5.8 <http://mailcrypt.sourceforge.net/>
    >
    > iEYEARECAAYFAkzOwuwACgkQM0LLzLt8MhxR6ACfYQjriXTSFL//tixAmPpq8Nld
    > JM0AoJ8C3yx/nc11jJi6vcM7tnSw5Agm
    > =Qs9G
    > -----END PGP SIGNATURE-----


    Hi Merciadri.
    every few years the VHDL standard gets reworked.
    Beginning with first release in 1987, then came 1993 which should now
    be accepted by all tools.
    2002 was next and most of the changes should be available in the
    tools.
    2008 is the latest change but the tools just started to adopt the new
    stuff.

    In your simulator there may be a compile switch to select the allowed
    standard (e.g. modelsims vcom: -87 -93-2002).
    While both of your code examples will pass vcom with the -93 or -2002
    option,
    I suspect that the second example will fail with the -87 option
    enabled.

    Just give it a try.
    Have a nice simulation
    Eilert
    backhus, Nov 2, 2010
    #4
  5. On Nov 2, 7:16 am, backhus <> wrote:
    > On 1 Nov., 14:38, Merciadri Luca <>
    > wrote:
    >
    >
    >
    > > -----BEGIN PGP SIGNED MESSAGE-----
    > > Hash: SHA1

    >
    > > Hi,

    >
    > > I generally write

    >
    > > ==
    > > architecture my_arch of my_stuff is
    > > - -- signal, etc., declarations
    > > begin
    > > process
    > > - -- var declarations
    > > begin
    > > - -- code
    > > end process;
    > > end my_arch;
    > > ==

    >
    > > but I saw lately, in VHDL Tutorial, by Peter J. Ashenden (Ashenden
    > > designs PTY., LTD., consultant), that he did it this way:

    >
    > > ==
    > > architecture my_arch of my_stuff is
    > > - -- signal, etc., declarations
    > > begin
    > > process is
    > > begin
    > > end process;
    > > end architecture my_arch;
    > > ==

    >
    > > There are two main differences between our approaches. The first is
    > > that he uses the `is' keyword after `process'. The second is that he
    > > writes `architecture' before the architecture's name, in the closing
    > > line of the architecture my_arch.

    >
    > > Is there a reason to prefer one of the approaches to the other?

    >
    > > Thanks.
    > > - --
    > > Merciadri Luca
    > > Seehttp://www.student.montefiore.ulg.ac.be/~merciadri/
    > > - --

    >
    > > You can fool all of the people some of the time, some of the people all of the time, but you can't fool all of the people all of the time. (Abraham Lincoln)
    > > -----BEGIN PGP SIGNATURE-----
    > > Version: GnuPG v1.4.9 (GNU/Linux)
    > > Comment: Processed by Mailcrypt 3.5.8 <http://mailcrypt.sourceforge.net/>

    >
    > > iEYEARECAAYFAkzOwuwACgkQM0LLzLt8MhxR6ACfYQjriXTSFL//tixAmPpq8Nld
    > > JM0AoJ8C3yx/nc11jJi6vcM7tnSw5Agm
    > > =Qs9G
    > > -----END PGP SIGNATURE-----

    >
    > Hi Merciadri.
    > every few years the VHDL standard gets reworked.
    > Beginning with first release in 1987, then came 1993 which should now
    > be accepted by all tools.
    > 2002 was next and most of the changes should be available in the
    > tools.
    > 2008 is the latest change but the tools just started to adopt the new
    > stuff.
    >
    > In your simulator there may be a compile switch to select the allowed
    > standard (e.g. modelsims vcom: -87 -93-2002).
    > While both of your code examples will pass vcom with the -93 or -2002
    > option,
    > I suspect that the second example will fail with the -87 option
    > enabled.
    >
    > Just give it a try.
    > Have a nice simulation
    >   Eilert


    Thanks for pointing this out.
    Merciadri Luca, Nov 2, 2010
    #5
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. Naresh Agarwal
    Replies:
    2
    Views:
    3,525
    Brad BARCLAY
    Jan 8, 2004
  2. Avi
    Replies:
    6
    Views:
    487
    James Kanze
    May 14, 2008
  3. Tricky
    Replies:
    1
    Views:
    458
    Mike Treseler
    Oct 16, 2008
  4. supervixen
    Replies:
    1
    Views:
    315
    Maxim Yegorushkin
    Dec 3, 2009
  5. luca
    Replies:
    1
    Views:
    295
    Nick Keighley
    Aug 15, 2011
Loading...

Share This Page