Greenhorn said:
I intended to ask how the machine's which use two's complement deal
with these.
Virtually every machine uses two's complement, and it is reasonably safe to
assume that you have it on the rare occasions when you need to access bit
values directly.
However it is not the only possible method for representing negative
numbers. Floating-point formats, for example, almost always use a flag bit
to represent a negative.
C doesn't make any requirements, though it is implict that the C
representation will also be the underlying hardware representation.
You say that most processor's today have subtract instruction, do they
have a circuit for computing subtraction or do they internally use some
thing like two's complement in evaluating the expression (e.g., b - c)
When you say "most processors" do you mean "the processor which my learner C
program is likely to run on" or do you mean "the randomly-selected processor
from the set of all in existence"? Most processors are not 3 giga hertz
Intel jobs that sit in PCs, but little embedded control devices that keep
fridges at the right temperature or make the dolly cry when her dummy is
removed. C is a major language for programming these chips.
You can get away without a "subtract" instruction by using the procedure
invert, increment, add (discarding overflow) as long as you use two's
complement. So the C expression x = a - b might well resolve to those three
machine language instructions. If you have a dedicated "subtract"
instruction, the complier will usually use it in preference, because the
chip designers include it to speed things up. On a PC, there will always be
a subtract instruction. On a little embedded device, maybe not.