P
Paul
Hi,
I'm porting a fixed point simulink (SL) model to vhdl. The SL type is
fixdt(..., WORDLENGTH, FRACLENGTH) where sfixed does have a different
notation.
For convience I wrote a VHDL function to convert the type in a package:
package body ...
function fixdt_to_sfixed(
constant WordLength : integer;
constant FractionLength : integer)
return UNRESOLVED_sfixed
is
constant left : integer := WordLength - FractionLength - 1;
constant right : integer := -FractionLength;
variable result : UNRESOLVED_sfixed(left downto right);
begin
return result;
end;
end ...
to avoid type computations ans signal like:
architecture ....
constant COEFFICIENT_LEFT : integer := COEFFICIENT_WORDLENGTH -
COEFFICIENT_FRACTIONLENGTH - 1;
constant COEFFICIENT_RIGHT : integer := -COEFFICIENT_FRACTIONLENGTH;
subtype coeefficient_type is sfixed(COEFFICIENT_LEFT downto
COEFFICIENT_RIGHT);
constant COEEFFICIENT_SIZER : coeefficient_type := (others => '0');
signal b0_coeff_s : coeefficient_type;
begin
b0_coeff_s <= to_sfixed( input_b0, COEEFFICIENT_SIZER);
But this approach won't work:
architecture behave OF df1tsos_tester is
signal coeff_a0 : fixdt_to_sfixed(COEFFICIENT_WORDLENGTH,
COEFFICIENT_FRACTIONLENGTH);
is there such a way? How to?
Thanks,
Olaf
I'm porting a fixed point simulink (SL) model to vhdl. The SL type is
fixdt(..., WORDLENGTH, FRACLENGTH) where sfixed does have a different
notation.
For convience I wrote a VHDL function to convert the type in a package:
package body ...
function fixdt_to_sfixed(
constant WordLength : integer;
constant FractionLength : integer)
return UNRESOLVED_sfixed
is
constant left : integer := WordLength - FractionLength - 1;
constant right : integer := -FractionLength;
variable result : UNRESOLVED_sfixed(left downto right);
begin
return result;
end;
end ...
to avoid type computations ans signal like:
architecture ....
constant COEFFICIENT_LEFT : integer := COEFFICIENT_WORDLENGTH -
COEFFICIENT_FRACTIONLENGTH - 1;
constant COEFFICIENT_RIGHT : integer := -COEFFICIENT_FRACTIONLENGTH;
subtype coeefficient_type is sfixed(COEFFICIENT_LEFT downto
COEFFICIENT_RIGHT);
constant COEEFFICIENT_SIZER : coeefficient_type := (others => '0');
signal b0_coeff_s : coeefficient_type;
begin
b0_coeff_s <= to_sfixed( input_b0, COEEFFICIENT_SIZER);
But this approach won't work:
architecture behave OF df1tsos_tester is
signal coeff_a0 : fixdt_to_sfixed(COEFFICIENT_WORDLENGTH,
COEFFICIENT_FRACTIONLENGTH);
is there such a way? How to?
Thanks,
Olaf