unconstrained args for procedures

Discussion in 'VHDL' started by Olaf Petzold, Nov 25, 2005.

  1. Olaf Petzold

    Olaf Petzold Guest

    Hi,

    this time a question to unconstrained args for procedures. Is there a
    way to write it something like:

    package oo is
    procedure foo (
    signal a, b : in std_logic_vector(natural range <>);
    ....

    package body oo is

    procedure foo(
    signal a, b : std_logic_vector(natural range <>);
    ...) is
    constant WIDTH : natural := a'range;
    ...
    begin
    ...

    I got syntax errors. Imo there is no reasing why isn't possible.

    Thank you
    Olaf
     
    Olaf Petzold, Nov 25, 2005
    #1
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  2. Olaf Petzold

    Olaf Petzold Guest

    Olaf Petzold schrieb:
    > Hi,
    >
    > this time a question to unconstrained args for procedures. Is there a
    > way to write it something like:
    >
    > package oo is
    > procedure foo (
    > signal a, b : in std_logic_vector(natural range <>);
    > ....
    >
    > package body oo is
    >
    > procedure foo(
    > signal a, b : std_logic_vector(natural range <>);
    > ...) is
    > constant WIDTH : natural := a'range;
    > ...
    > begin
    > ...
    >
    > I got syntax errors. Imo there is no reasing why isn't possible.


    Wow, it's easy - even leave the range specs empty. Unfortunally vsim
    crashs on accessing a's range:

    generating 'RANGE in gen_attr()
    ** Fatal: Unexpected signal: 11.

    Regards,
    Olaf
     
    Olaf Petzold, Nov 25, 2005
    #2
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  3. Olaf Petzold

    Andy Peters Guest

    Olaf Petzold wrote:
    > Hi,
    >
    > this time a question to unconstrained args for procedures. Is there a
    > way to write it something like:
    >
    > package oo is
    > procedure foo (
    > signal a, b : in std_logic_vector(natural range <>);
    > ....


    Drop the (natural range <>) part.

    Simply declare it as std_logic_vector.

    -a
     
    Andy Peters, Nov 28, 2005
    #3
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