You can slice it by the bit, you can slice it by GiG.
There is still only one address per Location!
I have used microproccessors with RISC, with nonrisc, even some with a
PRogrammable micro code.
And on every Computer, microproccessor, digital circuit, there is still only
one location for the specified address, I dont care how big or small a chunk
you look at. Or on what HW you look at.
The computer will not change it's abilities to read what the Memory bus can
put out between members in a struct.
There is NO physical conection.
You act like your bits can't possibly be what the HW was designed to
manipulate.
Why would you build a 32 bit data bus and say that reading 4 chunks of 8
bits each were any faster than reading the whole 32.
would reading 32 chunks of 1 bit, be even faster?
IT doesn't matter, in memory, the BITS are stored in contiguous groups.
For example the 486 uses 32 bit registers, the actual indexing is done 8
bits per address. However reading 4 chars is slower than 1 dword.
Becuase you read 32 bits for each char read. FACT!
even on your micropro with bitslicing architecture, lets say you have 16
bits of data bus, but you only want to use 4 bits. OK you can, ITs still in
the middle of one huge array of integers. FACT! It's still contiguous.
And every time you access those 4 bits they are in the same Physical
location as before.
I think you may have confused what I was saying with how I was saying it.
Do you think we should optimize code that only utilized 1/8 of the register,
or 1/4 of the data bus, whats the point.
You have to get the code to run twice as fast to make up for only using 1/2
the registers, 1/2 data bus, etc.
Thats always going to be true. And that is my point.
Walter Roberson said:
:I'm sorry, when you show me a computer with contiguous ram, that has more
:than one memory location for any one given address then you'll have an
:argument.
There are several systems around for which the smallest addressible
unit is the "word", and there are special instructions necessary
to extract characters within words. For some of those, a character
can start at an arbitrary bit position within the word!
On bitslice architectures, bit-wise packing of structures is
possible -- e.g., if you had
typedef struct { unsigned int i:3, char c, int j } s3cj;
s3cj A[2];
then the compiler might choose to lay A out in memory as (bitwise)
iiiccccccccjjjjjjjjjjjjjjjjjjjjj
jjjjjjjjjjjiiiccccccccjjjjjjjjj
jjjjjjjjjjjjjjjjjjjjjjj
0123456789ABCDEF0123456789ABCDEF
Clearly on such an architecture, the offset to j is not
a multiple of a byte/word/int/long .
:and yes : int[], char[], word[], WhatHaveYa[];
:is all the same in HW.
Wrong. There has perhaps been an equivilence on all the architectures
you have worked on, but you have to remember that C is defined in such
a way as to be implimentable on oddities such as 1's compliment
machines and embedded microprocessors.
It isn't uncommon on RISC machines for the actual memory size read or
written for each access to main memory to be fairly large -- an entire
"cache line" at a time, where a cache might be (e.g.) 64 bytes. On
such systems, the smallest individually addressible unit may be the 32
bit or 64 bit long, with there being extra instructions needed to
access smaller units.
As far as the C standard is concerned, there is no problem if, instead
of the memory being a stream of individually addressible bytes, there
are addressing modes that take a base address and an index and access
or store at the appropriate location; e.g., MOV.S A3(D6),D0 could
perform an index operation into memory, taking the D6'th short from the
begining of A3, even though that might not fall onto a directly
addressible boundary.
If you re-examine what you are allowed to do with pointers, you will
find that you are not allowed to compare pointers to different
objects [even of the same type], and that casting a pointer to
anything other than a "compatible" type is not certain to be
meaningful. Converting a pointer to (void *) and back again
is constrained to compare equal to the original, but it is
legal for different pointer types to be different sizes
and to hold different internal information.
