Shannon said:
Ok, I struggle with this each and every time. Can someone help
clarify for me when each version of these is valid to use? They all
look so similar to me but I have to randomly guess each time I want to
use one type of signal with a different type of signal.
I'll give it a shot. I am assuming here that you are using either IEEE.NUMERIC_BIT or
IEEE.NUMERIC_STD for the definition of signed/unsigned.
unsigned(<expr>) is a type conversion, and part of the base language. A type conversion
provides for explicit conversion between closely related types. Without considering
user-defined types, <expr> will be one of: std_logic_vector, std_ulogic_vector, or signed.
unsigned'(<expr>) is a qualified expression, and also part of the base language. It is
used to explicitly provide the type and/or subtype of an expression. This is common when
the type of <expr> is not known from the context, as perhaps with a bit string literal.
This is less commonly needed than a type conversion, as VHDL is usually pretty good at
figuring out from the context what e.g. the type of "00001111" needs to be.
to_unsigned(<expr>, <size>) is a function in IEEE.NUMERIC_[STD|BIT] that accepts an <expr>
of type NATURAL (a non-negative integer) and converts it to a unsigned vector of length
<size>.
Regards,