unsigned vs integer

dsd

Joined
Nov 1, 2007
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Are there any advantages to using unsigned (or signed for that matter) versus using integer? I can't see that they are different from a logic perspective, but I suspect that the actual compiler could handle them different (some might handle one better than the other).

There are not that many differences when it comes to the actual allowable use, as illustrated below,

PHP:
-- counter using unsigned
signal counter_uv : unsigned(7 downto 0);
process(rst, clk)
begin
  if (rst = '1') then
    counter_uv <= to_unsigned(0, 8);  -- reset the counter to zero
  elsif rising_edge(clk) then
    counter_uv <= counter_uv + 1;     -- increment counter
  end if;
end process;

-- counter using integer
signal counter_i : integer range 0 to 255;
process(rst, clk)
begin
  if (rst = '1') then
    counter_i <= 0;               -- reset the counter to zero
  elsif rising_edge(clk) then
    counter_i <= counter_i + 1;   -- increment counter
  end if;
end process;

If you want to convert to std_logic_vector, then using unsigned is a bit more readable,

PHP:
-- convert between unsigned and slv
counter_slv <= std_logic_vector(counter_uv);
counter_uv  <= unsigned(counter_slv);

-- covert between integer and slv
counter_slv <= std_logic_vector( to_unsigned (counter_i, 8) );
counter_i   <= to_integer( unsigned (counter_slv) );

As I said before, from a logic perspective I can't see how they would differ if they are declared correctly.

Any perspectives on which one is better, if any? (FYI I'm using Quartus compiler)
 

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