URGENT HELP!!! I NEED A PROJECT MADE IN VHDL FOR SIGNAL GENERATION ON FPGA.....

Discussion in 'VHDL' started by tudormarchis, Feb 6, 2007.

  1. tudormarchis

    tudormarchis Guest

    URGENT HELP!!! I NEED A PROJECT MADE IN VHDL FOR SIGNAL GENERATION ON
    FPGA.....

    please world help meeeee
     
    tudormarchis, Feb 6, 2007
    #1
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  2. Re: URGENT HELP!!! I NEED A PROJECT MADE IN VHDL FOR SIGNAL GENERATIONON FPGA.....

    tudormarchis a écrit :
    > URGENT HELP!!! I NEED A PROJECT MADE IN VHDL FOR SIGNAL GENERATION ON
    > FPGA.....
    >
    > please world help meeeee


    How much are you ready to pay for it ?

    Nicolas
     
    Nicolas Matringe, Feb 7, 2007
    #2
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  3. tudormarchis

    Dave Pollum Guest

    On Feb 6, 4:55 pm, "tudormarchis" <> wrote:
    > URGENT HELP!!! I NEED A PROJECT MADE IN VHDL FOR SIGNAL GENERATION ON
    > FPGA.....
    >
    > please world help meeeee


    Connect the ouput of an oscillator to a clock input of a FPGA. Inside
    the FPGA create a counter. Connect the counter's outputs to pins of
    the FPGA. If you don't understand this, then read books on digital
    hardware design.
    BTW, the first step in making this generator (or any other "thing")
    is to decide _what_ the signal generator (or "thing") should do! Ask
    your professor for the specs! sheesh!

    -Dave Pollum
     
    Dave Pollum, Feb 8, 2007
    #3
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