Jon said:
"Willem Oosthuizen" <
[email protected]> wrote in message
Hi Willem,
VHDL defined the minimum supported range of an integer to be -2^32
to (2^31)-1. Some simulators extended the range for integers and you
would have to check to see if yours did.
One way not very efficient is to break up the number into a sum of
integers each no greater than 2^32.
jon
I know this is very pedantic
but the range is guaranteed
to be
(-2^32)+1 to (2^31)-1, i.e. the most negative number is not
guaranteed by
the standard to be included. Of course in practice is always
is!
Regarding the original question, you might be able to
achieve something
similar using shifts. It's not clear from your original code
if n is a
constant or a signal. I shall assume it's a signal.
process(n)
begin
D <= (others => '0'); -- all bits 0
D(n) <= '1'); -- e.g. n = 0 => set bit 0, n = 1 =>
set bit 1
D(7 downto 0) <= X"FF";
end process;
If n is locally static (i.e. a constant), then you *should*
be able to write
D <= (n=> '1', 7 downto 0 => '1', others => '0');
kind regards
Alan
--
Alan Fitch
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