D
Davy
Hi all,
I am reading the book "Writing Testbench" and found my previous
testbench style is RTL.
Can I change Verilog RTL Testbench to Behavioral Testbench, is the
below code right?
//---- RTL style---
Always@(posedge clk)
If(EN)
...
//------------------
//----Behavioral style---
Always begin
wait(EN);
@(posedge clk);
...
end
//-----------------------
Is there any other better Behavioral style?
Any suggestions will be appreciated!
Best regards,
Davy
I am reading the book "Writing Testbench" and found my previous
testbench style is RTL.
Can I change Verilog RTL Testbench to Behavioral Testbench, is the
below code right?
//---- RTL style---
Always@(posedge clk)
If(EN)
...
//------------------
//----Behavioral style---
Always begin
wait(EN);
@(posedge clk);
...
end
//-----------------------
Is there any other better Behavioral style?
Any suggestions will be appreciated!
Best regards,
Davy