VHDL 2 VERILOG CONVERTER FOR AHB

Discussion in 'VHDL' started by terabits, Dec 12, 2006.

  1. terabits

    terabits Guest

    Hi

    Any one has vhdl to verilog converter ?????
    i have one but it translates only 60 lines of code.
    if you have and if u cannot pass on to me, could you please conver the
    ahb generator in opencores to verilog format and post it ????
    as i see there are many questions about ahb models there is one is
    opencores but in vhdl, conversion it to verilog would be greatly
    appreciated.

    Regards
     
    terabits, Dec 12, 2006
    #1
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  2. Colin Paul Gloster, Dec 18, 2006
    #2
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  3. terabits

    terabits Guest

    terabits, Feb 7, 2007
    #3
  4. terabits

    terabits Guest

    On Dec 18 2006, 9:55 am, Colin Paul Gloster
    <> wrote:
    > I have not tried it but you could try
    > WWW.Ocean-Logic.com/pub/vhd2vl2.tgz


    oh this one , i've tried it doesn't support many constructs :(
     
    terabits, Feb 7, 2007
    #4
  5. terabits

    mayankmehta_83

    Joined:
    Sep 27, 2007
    Messages:
    1
    WWW.Ocean-Logic.com/pub/vhd2vl2.tgz isn't working !!

    :guru:
    in terminal window of RHEL4 i typed make [in src directory] and then typed vhd2vl test.vhd > test.v it is saying vhd2vl: command not found
    :roll:

    please help...

    is there any other vhdl to verilog convertor available ??
     
    mayankmehta_83, Sep 27, 2007
    #5
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