VHDL 200X....when?

Discussion in 'VHDL' started by My Name, Jul 30, 2005.

  1. My Name

    My Name Guest

    When should we realistically expect to see VHDL 200X incorporated into
    some of our EDA tools? 1-2 years? 3-5 years? does anyone out there have
    a feel for this?

    Just curious where we're at.
    My Name, Jul 30, 2005
    #1
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  2. My Name

    David Bishop Guest

    My Name wrote:
    > When should we realistically expect to see VHDL 200X incorporated into
    > some of our EDA tools? 1-2 years? 3-5 years? does anyone out there have
    > a feel for this?
    >
    > Just curious where we're at.


    Your guess is as good as mine. We have passed things off to Accellera
    now. As a DASC committee we can't really have money, and LRM editing
    cost money.

    If the money comes through (and some already has) and the new committee
    doesn't drop the ball, then you should be seeing something soon.

    http://www.accellera.org/home

    http://www.eda.org/vhdl-200x/

    For the latest news:
    http://www.eda.org/vhdl-200x/hm/
    David Bishop, Jul 31, 2005
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  3. My Name

    Neo Guest

    hopefully something concrete around 2007, but thats my guess!
    Neo, Aug 1, 2005
    #3
  4. My Name

    Jim Lewis Guest

    Neo,
    > hopefully something concrete around 2007, but thats my guess!


    My expectation is that we should see new features standardized
    and implemented sometime in 2006.

    My Rationale:
    The IEEE process is largely controlled by benevolent experts.
    The experts make the standards. The vendors then wait to see
    what the users are interested in and implement those.

    The process in Accellera is a little different.
    In Accellera, users set the priorities of what gets done
    and what does not get done. Hence, EDA vendors will have
    a high degree confidence that the Accellera implemented
    features have high user priority and hence may actually
    implement them ahead of the standards finalization process
    (similar to how they did with System Verilog).

    Best Regards,
    Jim
    --
    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    Jim Lewis
    Director of Training mailto:
    SynthWorks Design Inc. http://www.SynthWorks.com
    1-503-590-4787

    Expert VHDL Training for Hardware Design and Verification
    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    Jim Lewis, Aug 2, 2005
    #4
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