VHDL and SAIF

Discussion in 'VHDL' started by abhishek, Jan 7, 2005.

  1. abhishek

    abhishek Guest

    SAIF is switching activity interchange format.This feature is used by
    synthesis tools for power optimisation.As far as my understanding goes,
    SAIF is senstive only to value changes of the registers or wire.
    Whenever there is a transition b/w four logic states 0,1,X,Z , it
    calculates the power used in these transitions.

    However if there is no value change on a reg/wire, but there is a
    change of voltage only (strength of that particular wire/reg changes)
    then does this bvoltage chane also leads to power consumption.
    And if yes then it should also be voltage chjanges(when value is
    constant) should also be recorded by our synthesis tool) for power
    optimisation.
    Please respond asap.


    Thanks
    Abhishek
     
    abhishek, Jan 7, 2005
    #1
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  2. Abhishek wrote...

    ....
    >However if there is no value change on a reg/wire, but there is a
    >change of voltage only (strength of that particular wire/reg changes)
    >then does this bvoltage chane also leads to power consumption. ...


    If there is a change in voltage level then that would give rise to the
    change in Logic....
    I would like to know how is the voltage level on Wire / Net changes
    with out changing the logic level.Are you talking about the electrical
    noise from neioghbouring wires OR noise from the bouncing GND and VDD
    ??????

    SAIF is for Switching Activity and only switching of logic is
    considered. This Power Calculation is also termed as Dynamic Power.
    Regards,
    Mohammed Khader.
     
    Mohammed khader, Jan 7, 2005
    #2
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