VHDL -> block diagram

Discussion in 'VHDL' started by dave.bryan@gmail.com, Nov 29, 2005.

  1. Guest

    Hi,

    Does anyone know of a tool which will import a set of VHDL design files
    and produce a block diagram showing the component interconnections
    (without any RTL
    translation unlike Xilinx ISE schematic viewer) ?

    Thanks
     
    , Nov 29, 2005
    #1
    1. Advertising

  2. Eric Guest

    1. Advertising

  3. anupam Guest

    hi,
    Every simulation window has an option to see the schematic of the
    design like
    ncsim of cadence has simvision
    debussy of novas shows schematic with good clarity ....

    regards,
    Anupam Jain
     
    anupam, Nov 30, 2005
    #3
  4. schrieb:
    > Hi,
    >
    > Does anyone know of a tool which will import a set of VHDL design files
    > and produce a block diagram showing the component interconnections
    > (without any RTL
    > translation unlike Xilinx ISE schematic viewer) ?


    I belive HDL Designer by Mentor has a HDL2Graphics feature. I never
    tried it.

    Bye Tom
     
    Thomas Reinemann, Nov 30, 2005
    #4
  5. indeed, ncsim has simvision to draw blockdiagrams and it works very nice!
    You can use simvision for debugging your (top level) code as well.

    --
    ----------------------------------------------
    <> wrote in message
    news:...
    > Hi,
    >
    > Does anyone know of a tool which will import a set of VHDL design files
    > and produce a block diagram showing the component interconnections
    > (without any RTL
    > translation unlike Xilinx ISE schematic viewer) ?
    >
    > Thanks
    >
     
    Marc Horemans, Dec 4, 2005
    #5
  6. Mariusz Guest

    Marc Horemans wrote:
    > indeed, ncsim has simvision to draw blockdiagrams and it works very nice!
    > You can use simvision for debugging your (top level) code as well.
    >
    > --
    > ----------------------------------------------
    > <> wrote in message
    > news:...
    >> Hi,
    >>
    >> Does anyone know of a tool which will import a set of VHDL design files
    >> and produce a block diagram showing the component interconnections
    >> (without any RTL
    >> translation unlike Xilinx ISE schematic viewer) ?
    >>
    >> Thanks
    >>

    >
    >

    Aldec's Active-HDL hac Code2Graphics that converts Verilog or VHDL to
    Diagrams without simulation:

    http://www.aldec.com/products/active-hdl/multimediademo/movies/code2graphics/
    http://www.aldec.com/products/active-hdl/multimediademo/movies/code2fsm/


    Also it has so called Advanced Dataflow that shows the interconnects and
    interactions between processes and signals in the design when simulation
    is initialized:

    http://www.aldec.com/products/active-hdl/multimediademo/movies/advanced_dataflow/

    Mariusz
     
    Mariusz, Dec 4, 2005
    #6
  7. Guest

    Mariusz & all who replied,

    Thanks for the suggestions for s/w to show interconnection between
    instantiated components in a VHDL design. I was looking for a low cost
    solution to automate documentation of designs but it seems that I'd
    have to outlay quite a bit of cash to get this feature (I'd get many
    others with it though). I think I'll stick with the manual approach for
    now!

    Thanks
    Dave
     
    , Dec 4, 2005
    #7
  8. wrote:


    > I was looking for a low cost
    > solution to automate documentation of designs but it seems that I'd
    > have to outlay quite a bit of cash to get this feature


    emacs vhdl-mode speedbar will give you most of
    what you want for zero cash:
    http://opensource.ethz.ch/emacs/vhdl-mode.gif

    -- Mike Treseler
     
    Mike Treseler, Dec 5, 2005
    #8
  9. Guest

    Mike,
    Thanks for the suggestion but I'm looking for something that can
    document a design that a non-HDL engineer can easily follow i.e. block
    diagram.
    Thanks
    Dave
     
    , Dec 5, 2005
    #9
  10. Guest

    wrote:
    > Mike,
    > Thanks for the suggestion but I'm looking for something that can
    > document a design that a non-HDL engineer can easily follow i.e. block
    > diagram.
    > Thanks
    > Dave


    Hi Dave, try www.expressivesystems.com where there is a fully
    functional demo download of Expressive-IV

    Brian
     
    , Dec 9, 2005
    #10
  11. Guest

    Brian,

    I've looked at your software & it looks very interesting (the price is
    nice too!). However it appears that it is unable to import an existing
    VHDL design & convert it to a graphical representation which is what
    I'm looking to do. Am I missing something ?

    Dave

    > wrote:
    > > Mike,
    > > Thanks for the suggestion but I'm looking for something that can
    > > document a design that a non-HDL engineer can easily follow i.e. block
    > > diagram.
    > > Thanks
    > > Dave

    >
    > Hi Dave, try www.expressivesystems.com where there is a fully
    > functional demo download of Expressive-IV
    >
    > Brian
     
    , Dec 9, 2005
    #11
  12. Brian Guest

    wrote:
    > Brian,
    >
    > I've looked at your software & it looks very interesting (the price is
    > nice too!). However it appears that it is unable to import an existing
    > VHDL design & convert it to a graphical representation which is what
    > I'm looking to do. Am I missing something ?
    >
    > Dave
    >
    >> wrote:
    >>> Mike,
    >>> Thanks for the suggestion but I'm looking for something that can
    >>> document a design that a non-HDL engineer can easily follow i.e. block
    >>> diagram.
    >>> Thanks
    >>> Dave

    >> Hi Dave, try www.expressivesystems.com where there is a fully
    >> functional demo download of Expressive-IV
    >>
    >> Brian

    >

    No, you are not missing anything Dave, it cannot import existing
    designs. It is best used for new designs.

    Perhaps for your next design...........


    --

    Cheers
    Brian
    ___________________________________
    Expressive Systems.
    www.expressivesystems.com
     
    Brian, Dec 9, 2005
    #12
  13. Guest

    Brian

    How 'easy' is it to add this functionality to the software? Is it on
    the cards?

    Dave
     
    , Dec 9, 2005
    #13
  14. Brian Guest

    wrote:
    > Brian
    >
    > How 'easy' is it to add this functionality to the software? Is it on
    > the cards?
    >
    > Dave
    >

    Dave, it has been on the cards in the past but it is not easy to do it
    sensibly, so you get a good layout which does not require to do a lot of
    clean-up.

    Our customers have always wanted us to do more enhancements to the
    functionality instead. Once a company or user starts using the tool the
    need to take in existing designs diminished rapidly so on-going
    functionality is always more important so it's never got high on the
    priority list. We can take in existing functionality as part of the
    hierarchy of new designs making moving forward with the tool a little
    less difficult.

    --

    Cheers
    Brian
    ___________________________________
    Expressive Systems.
    www.expressivesystems.com
     
    Brian, Dec 9, 2005
    #14
  15. info_ Guest

    wrote:

    > Brian,
    >
    > I've looked at your software & it looks very interesting (the price is
    > nice too!). However it appears that it is unable to import an existing
    > VHDL design & convert it to a graphical representation which is what
    > I'm looking to do. Am I missing something ?
    >


    Ease-VHDL does a nice job.
    If you don't want to edit the result, most synthesis tools
    now do that.

    Bert
     
    info_, Dec 10, 2005
    #15
  16. Guest

    Bert,

    Thanks for the info. It looks like Easy VHDL does what I'm looking for
    (not sure of the price yet though).

    Dave
     
    , Dec 11, 2005
    #16
  17. Brian Guest

    wrote:
    > Bert,
    >
    > Thanks for the info. It looks like Easy VHDL does what I'm looking for
    > (not sure of the price yet though).
    >
    > Dave
    >

    Best of luck, hope it works for you (at a good price)

    --

    Cheers
    Brian
    ___________________________________
    Expressive Systems.
    www.expressivesystems.com
     
    Brian, Dec 12, 2005
    #17
  18. mr_haiko

    Joined:
    Apr 14, 2009
    Messages:
    1
    please help me!!!

    Hi dear All
    I would like to know what advantages VHDL from LabView FPGA.
    What can I do by means of VHDL which I didn't do by means of LabView FPGA.

    Best regards
    Haik

    P.S. Sorry for my English.
     
    mr_haiko, Apr 14, 2009
    #18
  19. JohnDuq

    Joined:
    Dec 9, 2008
    Messages:
    88
    Dave, what is wrong with the free version of the Xilinx software? If your design is too large for that it seems you could break it into smaller sections for documentation purposes.

    Or is a schematic diagram not good enough, and you really need a block diagram? At that level of abstraction I don't believe you can leave it to a computer (I'm Sorry Dave...). Except maybe a really expensive package as you mentioned.

    John
     
    JohnDuq, Apr 17, 2009
    #19
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. Replies:
    5
    Views:
    13,220
    Jahagirdar Vijayvithal S
    Jul 21, 2005
  2. pitarda
    Replies:
    4
    Views:
    5,851
    Frank Buss
    Nov 29, 2006
  3. meshoshow
    Replies:
    3
    Views:
    5,567
    Mike Treseler
    Dec 15, 2006
  4. morrell
    Replies:
    1
    Views:
    992
    roy axenov
    Oct 10, 2006
  5. Aiken
    Replies:
    2
    Views:
    1,930
    Shannon
    Jun 20, 2008
Loading...

Share This Page