VHDL code for CIC filters

Discussion in 'VHDL' started by Sudhir, Feb 2, 2006.

  1. Sudhir

    Sudhir Guest

    Hi

    At the moment we are doing a project to implement all the blocks of DDC
    on FPGA.I have been assigned the task for writing a VHDL code for the
    cic filter...could anyone out there give me an insight as to where I
    should begin???

    I have basic knowledge of VHDL and matlab...also I have a general idea
    on what the CIC filter consists of and how it works.The problem is that
    I don't have the knowledge of relating the working of the CIC filter
    and writing a vhdl code for it!!!

    Please help!

    Thanks Sudhir!
     
    Sudhir, Feb 2, 2006
    #1
    1. Advertising

  2. >I have basic knowledge of VHDL and >matlab...also I have a general idea
    >on what the CIC filter consists of and how it >works.The problem is that
    >I don't have the knowledge of relating the working >of the CIC filter
    >and writing a vhdl code for it!!!


    A CIC filter is just a shift register with an adder/subtractor at the
    end. I suggest you begin with a clock and reset signal, add a signal
    array, shift the values at every clock and at last the
    adder/subtractor.

    Details will be in every textbook of VHDL

    Hubble.
     
    Reiner Huober, Feb 3, 2006
    #2
    1. Advertising

  3. Sudhir

    Guest

    Sudhir wrote:
    > Hi
    >
    > At the moment we are doing a project to implement all the blocks of DDC
    > on FPGA.I have been assigned the task for writing a VHDL code for the
    > cic filter...could anyone out there give me an insight as to where I
    > should begin???
    >
    > I have basic knowledge of VHDL and matlab...also I have a general idea
    > on what the CIC filter consists of and how it works.The problem is that
    > I don't have the knowledge of relating the working of the CIC filter
    > and writing a vhdl code for it!!!
    >
    > Please help!
    >
    > Thanks Sudhir!


    What FPGA are you using? The Xilinx CoreGenerator can create DDC and
    CIC filters.

    The book "Digital Signal Processing with Field Programmable Gate
    Arrays" does a good job of discussing the implementation of them in
    both Verilog and VHDL.

    http://www.amazon.com/gp/product/35...103-5426372-2305419?s=books&v=glance&n=283155

    Regards,
    John McCaskill
     
    , Feb 4, 2006
    #3
  4. Sudhir

    Sudhir Guest

    Thanx for the replies...We are using the spartan IIe fpga. And we are
    actually trying to build each and every block of the DDC individually
    wihout the use of any coregens!!! Anyways Will try to get hold of the
    book as soon as possible!!!
     
    Sudhir, Feb 6, 2006
    #4
  5. Sudhir

    nasimnasirian

    Joined:
    Oct 10, 2009
    Messages:
    1
    cic verilog code

    hi
    i use cic ip cores in my work, but in multichannel &untepolator mode it dos not work properly.I need the source code of cic interpolator or other helping option,please help me :-(
     
    nasimnasirian, Oct 10, 2009
    #5
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. Frank van Eijkelenburg

    filters in vhdl

    Frank van Eijkelenburg, Sep 30, 2003, in forum: VHDL
    Replies:
    1
    Views:
    743
  2. viswanath

    regarding filters in vhdl

    viswanath, May 17, 2004, in forum: VHDL
    Replies:
    7
    Views:
    8,315
    kjaraline
    Nov 18, 2009
  3. Dieter Vanderelst

    using the Filters DLL (image filters)

    Dieter Vanderelst, Feb 15, 2006, in forum: Python
    Replies:
    1
    Views:
    418
    Michele Petrazzo
    Feb 15, 2006
  4. sheeja
    Replies:
    2
    Views:
    838
    Ray Andraka
    Mar 15, 2007
  5. afd
    Replies:
    1
    Views:
    8,365
    Colin Paul Gloster
    Mar 23, 2007
Loading...

Share This Page