VHDL function synthesis

Discussion in 'VHDL' started by Thanga, Aug 30, 2006.

  1. Thanga

    Thanga Guest

    Hi all,
    I have doubt on VHDL function synthesis....

    my code structure is

    entity rtl is
    generic (

    parameter : interger := [value];
    );
    port(
    portlist
    );

    architecture
    begin
    function1;
    function2;
    function3;
    function4;
    end architecture;

    All the fucntions are defined in package.
    Depend on the generic parameter, one of four functions will be
    invoked.
    I have to optimize this logic for only one function.

    Now my doubt is,
    If I freeze the parameter to a constant value, during synthesis what
    will happen?
    ie) only the selected fuction will be synthesized or all the four
    funcions will be synthesized?

    I know one direct way is removing other functions.
    Since i don't want disturb the code but have to optimize the logic,
    asking this doubt....

    Thanks in advance,
    Thanga.
     
    Thanga, Aug 30, 2006
    #1
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  2. Thanga

    KJ Guest

    Thanga wrote:
    What you have listed is a bit sketchy but.
    > Now my doubt is,
    > If I freeze the parameter to a constant value, during synthesis what
    > will happen?
    > ie) only the selected fuction will be synthesized or all the four
    > funcions will be synthesized?

    If the synthesis tool can determine, based on the parameter that the
    other functions can not possibly be called then they will be optomized
    away. An example would be
    entity Foo is generic(Xyz: integer)
    end Foo;
    architecture FooFoo of Foo is
    begin
    case Xyz is
    when 1 => -- Do something
    when 2 => -- Do something else
    when 3 => -- Do something different
    when others => -- Do something really different
    end case;
    end FooFoo;

    If you then instantiate Foo(1) then in the synthesis output the entire
    case statement will collapse down to the "-- Do something" code.

    KJ
     
    KJ, Aug 30, 2006
    #2
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  3. Thanga wrote:

    > architecture
    > begin
    > function1;
    > function2;
    > function3;
    > function4;
    > end architecture;


    Note also that a function
    represents a value, not a process,
    so better make that something like:


    begin
    myport <= function1;


    -- Mike Treseler
     
    Mike Treseler, Aug 30, 2006
    #3
  4. Thanga

    Andy Guest

    Thanga,

    There are several issues with what you want to do:

    First, vhdl functions are not statements; they are expressions, and
    they must return a value which has to be handled (i.e. assigned to
    something, or evaluated in a condition). They cannot be called
    stand-alone.

    Procedures, on the other hand, are statements, and can be called
    stand-alone, as in a concurrent procedure call.

    However, all synthesis tools I'm aware of do not permit a procedure or
    function to pass time (i.e. have a wait statement). Therefore, unless
    the procedure defines purely combinatorial logic, it is not
    synthesizable.

    Finally, with no outputs or inputs, a concurrent procedure call will
    not synthesize to anything, regardless of what happens inside.

    >From a simulation point of view, a concurrent procedure call is an

    implied process with a sensitivity list made up of all the procedure's
    parameters of mode in or inout. If the procedure does not have
    parameters, then it will be executed exactly once. The re-execution
    normally associated with concurrent procedure calls would have to be
    handled with a loop internal to the process (i.e. never let it exit).

    As to optimizations, constants, generics, and for loop indices are all
    treated as static values and optimized out, to the extent possible.

    Andy


    KJ wrote:
    > Thanga wrote:
    > What you have listed is a bit sketchy but.
    > > Now my doubt is,
    > > If I freeze the parameter to a constant value, during synthesis what
    > > will happen?
    > > ie) only the selected fuction will be synthesized or all the four
    > > funcions will be synthesized?

    > If the synthesis tool can determine, based on the parameter that the
    > other functions can not possibly be called then they will be optomized
    > away. An example would be
    > entity Foo is generic(Xyz: integer)
    > end Foo;
    > architecture FooFoo of Foo is
    > begin
    > case Xyz is
    > when 1 => -- Do something
    > when 2 => -- Do something else
    > when 3 => -- Do something different
    > when others => -- Do something really different
    > end case;
    > end FooFoo;
    >
    > If you then instantiate Foo(1) then in the synthesis output the entire
    > case statement will collapse down to the "-- Do something" code.
    >
    > KJ
     
    Andy, Aug 30, 2006
    #4
  5. Thanga

    Thanga Guest

    Mike Treseler wrote:
    > Thanga wrote:
    >
    > > architecture
    > > begin
    > > function1;
    > > function2;
    > > function3;
    > > function4;
    > > end architecture;

    >
    > Note also that a function
    > represents a value, not a process,
    > so better make that something like:
    >
    >
    > begin
    > myport <= function1;
    >
    >
    > -- Mike Treseler



    Hi All,
    The code i have shown is just to adderss the issue. please ignore
    syntax...
    All I want to know is, if the parameter is fixed to constant value then
    how synthesis tool will react?
    Only the intended function for given parameter would be synthsized or
    all functions would be synthsized?

    Regards,
    Thanga.
     
    Thanga, Aug 31, 2006
    #5
  6. Thanga

    KJ Guest

    "Thanga" <> wrote in message
    news:...
    > Hi All,
    > The code i have shown is just to adderss the issue. please ignore
    > syntax...
    > All I want to know is, if the parameter is fixed to constant value then
    > how synthesis tool will react?

    Read my first post, the short answer is that given a particular parameter
    value everything that can't happen will be optomized away

    > Only the intended function for given parameter would be synthsized or
    > all functions would be synthsized?

    Correct

    KJ
     
    KJ, Aug 31, 2006
    #6
  7. Thanga

    KJ Guest

    KJ wrote:
    > > Only the intended function for given parameter would be synthsized or
    > > all functions would be synthsized?

    > Correct


    Oops, kinda confusing I was...what is correct is that "Only the
    intended function for given parameter would be synthsized"

    KJ
     
    KJ, Aug 31, 2006
    #7
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