Vhdl Program

[sudeep]

Hi i am BTech final year student doing a project which includes VHDL.I started learning using VHDL primer by bhasker.
I need a synchronizable program to delay a 40 mhz clock pulse by 7000ns.
Please do help because i wrote a program with my knowledge but my guide says
it is not synchronizable it is testbench program.
So please provide me with a synchronizable VHDL program for that.

 

[sudeep]

Please do reply i am unable to write synthesazable code please provide with an example i need to proceed with my project or atleast give any wite address to get solutions at.!!

 

[scottcarl]

Please do reply i am unable to write synthesazable code please provide with an example i need to proceed with my project or atleast give any wite address to get solutions at.!!

Sudeep,

How desperate do you sound!!! You'll get some help if you post your current code, otherwise not many people are simply going to give you the answer. Let's see 1/40Mhz = 20ns. 7000/20 = 350. How about a counter that goes up to 350!!

Scott

 

[sudeep]

Sorry but im completely new to VHDL and managed to write a testbench program using wait for or 'after'.But im not having any idea how to write statements for synthesizable code.

 

[sudeep]

advice

well at last i have written the program and executed well
again one problem

i used counters for the program and got it but is there any other method for that if yes please let me know it