VHDL Programming? Parallel Counter?

Discussion in 'VHDL' started by comp101x, Oct 28, 2009.

  1. comp101x

    comp101x

    Joined:
    Oct 28, 2009
    Messages:
    1
    Likes Received:
    0
    I want to implement a (7,3) parallel counter using VHDL. I thought about using 3 full adders but I got derailed when I saw that the output would give out 3 sums and carry out which would make 4 outputs and I need 3. With only 2 full adders, it would not represent 7 inputs.

    How would you go about doing it?

    **Without just giving me the implementation code, I want to understanddd

    Thanks
     
    comp101x, Oct 28, 2009
    #1
    1. Advertisements

  2. comp101x

    jeppe

    Joined:
    Mar 10, 2008
    Messages:
    348
    Likes Received:
    0
    Location:
    Denmark
    What's a (7,3) parallel counter?
    Could you explain the functionality of the counter: Inputs => outputs
    Will there be a Clock signal involved?
     
    jeppe, Oct 29, 2009
    #2
    1. Advertisements

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. mike
    Replies:
    10
    Views:
    9,388
    Cristian
    Feb 6, 2009
  2. The Eeediot
    Replies:
    3
    Views:
    2,518
    =?Utf-8?B?UnVsaW4gSG9uZw==?=
    Dec 22, 2004
  3. LRCR
    Replies:
    1
    Views:
    1,172
    Mike Treseler
    May 23, 2006
  4. coldplay112
    Replies:
    2
    Views:
    782
    rickman
    Sep 25, 2006
  5. afd
    Replies:
    1
    Views:
    9,973
    Colin Paul Gloster
    Mar 23, 2007
  6. George2
    Replies:
    1
    Views:
    1,033
    Alf P. Steinbach
    Jan 31, 2008
  7. Soren
    Replies:
    4
    Views:
    1,592
    c d saunter
    Feb 14, 2008
  8. Vivek Menon
    Replies:
    5
    Views:
    3,920
    Paul Uiterlinden
    Jun 8, 2011
Loading...