VHDL scalar attribute syntax

Discussion in 'VHDL' started by vu_5421, Mar 18, 2007.

  1. vu_5421

    vu_5421 Guest

    Given :

    signal bit_count0 : natural range 0 to CHAN0_BITCNT_MAX - 1;


    within a process, is why is the following statement giving me an error
    in ModelSim?

    if(bit_count0 = bit_count0'high ) then


    Of course this compiles no problem :

    if(bit_count0 = CHAN0_BITCNT_MAX - 1 ) then


    But the first if statement is a little more readable.

    Thanks for any help.
    vu_5421, Mar 18, 2007
    #1
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  2. vu_5421

    KJ Guest

    "vu_5421" <> wrote in message
    news:...
    > Given :
    >
    > signal bit_count0 : natural range 0 to CHAN0_BITCNT_MAX - 1;
    >
    >
    > within a process, is why is the following statement giving me an error
    > in ModelSim?
    >
    > if(bit_count0 = bit_count0'high ) then
    >
    >
    > Of course this compiles no problem :
    >
    > if(bit_count0 = CHAN0_BITCNT_MAX - 1 ) then
    >
    >
    > But the first if statement is a little more readable.
    >


    Unfortunately you have to define a new subtype which is a natural in the
    range that you want and then use the 'high attribute on the new subtype
    instead....I find that kind of annoying too.

    KJ
    KJ, Mar 18, 2007
    #2
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  3. vu_5421

    vipinlal

    Joined:
    Feb 25, 2010
    Messages:
    38
    does this help?
    vhdlguru.blogspot.com/2010/03/some-tricky-coding-methods-using-vhdl.html
    vipinlal, Mar 13, 2010
    #3
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