VHDL source code scrambler

[brian]

Hi all,

I need a VHDL source code scrambler/descrambler.
Polyn : x ^ 7 + x ^ 6 + 1

I found some information on web (LFSR xilinx, etc...), but I have some
problem with my example.

Thanks a lot for any reply about this subject (web, litteratur,vhdl
code...).
Brian

 

[Ralf Hildebrandt]

I need a VHDL source code scrambler/descrambler.
Polyn : x ^ 7 + x ^ 6 + 1

I found some information on web (LFSR xilinx, etc...), but I have some
problem with my example.

Post your code _and_ what you think about the problem / your ideas for
solution.

A scrambler is nothing more than some Flipflops (shift register) and
XOR-gates (for the feedback).

Ralf

 

[OutputLogic]

There is an online tool that generates a Verilog code for parallel scramblers with different polynomial sizes and coefficients. It's on "http OutputLogic dot com" [sorry, this forum doesn't let me post a link in a regular way]

Hope that helps