VHDL Study Group Meeting Notice

J

JimLewis

Hi,
In preparation for the next revision of VHDL, the DASC
(parent of the 1076 - VHDL) has given us permission to
form a study group with the purpose of writing the PAR
(project authorization request).

Meeting is scheduled for Wednesday Dec 1 at 8 am Pacific.
Dial in details will be announced later. Please enroll in the
VASG email reflector at (see bottom of page under participation)
http://www.eda.org/vasg/

This meeting is open to all who have a vested interest
in VHDL. Please participate. While I expect most of the
PAR to be easy for all, we do have one item that will come
up.

One item that will come up is whether to organize the VHDL
working group as an individual (as it has been) or corporate
based working group. Anyone with a vested interest in VHDL
can participate (attend meetings, be on the working group
email reflector, and attain voting rights) in an individual
based working group. In a corporate based working group,
to be an observer (attend meetings or be on the reflector)
will cost a company between $1250 and $5500 (depending on
corporate revenue). To be a voting member, one must be
an advanced corporate member at a cost of $3500 to $10000.
Unfortunately none of this money goes to the working group,
instead it goes to fund IEEE Standards Association (which
is a separate organization from IEEE). Any funding needed
by the working group will be a separate assessment.

Please attend and weigh in on this issue as this will
effect the working group.

Best Regards,
Jim Lewis
P.S.
If you think you are already on the VHDL-200X reflector, and
did not get this already, your email is bouncing (Mike T).
--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training mailto:[email protected]
SynthWorks Design Inc. http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 

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