VHDL test bench stimuli; reading from a file with control

[janaka]

Hello everyone ..

I am trying to simulate a vhdl component which needs to read some data but it should pause reading when a “ready for data” (RFD) output signal coming from the component is low and recommences reading when that signal is high. Can I achieve this when I am reading the data from a file? If so could you please let me know the method? Is there any other way to do this?

Thanks so much

Jan

 

[veevee1]

loop --or some structure where file is read
if RFD = '0' then
wait until RFD = '1';
end if;
readline...
read....

end loop;