viterbi decoder

[ashok_vlsi]

hi friends

i am doing project on viterbi decoder in vhdl.if any one have
opencore for viterbi decoder.please sent me the core to me.i any one done
this as project please sent ur code to me.

i can understand the algorithm .i can't able to implement it. if
any one have block diagram please send me diagram and explain it to me.

thank u
ashok
(e-mail address removed)

 

[javipos3]

Hi there!

If you find the VHDL source code (for a constraint length of 7, and a CC
rate of 1/2 is the one I'm looking for), please send it to me, it would be
very helpful!!!

ThankS!!

Javier López.

 

[Neo]

guys,
you dont have to worry a whit about the block diagrams or algorithm or
implementation details. Just give me the code rate and constraint
length or heck, dont bother about that also, just give me your
application and I'll figure out a best combination.
Everything will be handed to you on a platter, for just $2000 flat !!!

 

[seema]

i m planning to project on viterbi decoder
i have the knowledge of its function
but i m new to VHDL so i m having problem regarding its coding
if anyone has got the code of the same pls send me
thank u
seema
(e-mail address removed)

 

[mentari]

guys,
you dont have to worry a whit about the block diagrams or algorithm or
implementation details. Just give me the code rate and constraint
length or heck, dont bother about that also, just give me your
application and I'll figure out a best combination.
Everything will be handed to you on a platter, for just $2000 flat !!!

Great please post your contact details or email me: stephanusR(THINK)gmail.com

 

[NeoCambell]

There is a very good C++ code at expertcore.org/viewtopic.php?f=8&t=866

I think you can convert it easily to any language including VHDL, Verilog, etc... quite easily.

Kept this posted in case if someone looking for the same thing.

Regards,

Neo