VME VHDL bench

Discussion in 'VHDL' started by smu, Nov 21, 2005.

  1. smu

    smu Guest

    Hi,

    I am new on VMEbus. And I am curious to know if somebody wrote a "file
    controlled VMEbus testbench" which support interrupt acknowledge process ?

    Thank you in advance

    smu
     
    smu, Nov 21, 2005
    #1
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  2. Mike Treseler, Nov 21, 2005
    #2
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  3. smu

    smu Guest

    Mike Treseler a écrit :
    > smu wrote:
    >
    >> I am new on VMEbus. And I am curious to know if somebody wrote a "file
    >> controlled VMEbus testbench" which support interrupt acknowledge
    >> process ?

    >
    >
    > http://www.google.com/search?q=vme vhdl core testbench


    Hi Mike,

    If I ask here, it is because I did not find something who satisfy my
    requirements.

    Regards,

    smu
     
    smu, Nov 21, 2005
    #3
  4. smu a écrit:
    > I am new on VMEbus. And I am curious to know if somebody wrote a "file
    > controlled VMEbus testbench" which support interrupt acknowledge process ?


    Hi
    I did but it's somewhere in Mike's Google search results so I don't
    think you'll like it ;o)
    Anyway I can answer questions in my spare time.

    Nicolas
     
    Nicolas Matringe, Nov 22, 2005
    #4
  5. On Mon, 21 Nov 2005 17:49:38 +0100, smu <> wrote:

    >Hi,
    >
    >I am new on VMEbus. And I am curious to know if somebody wrote a "file
    >controlled VMEbus testbench" which support interrupt acknowledge process ?
    >

    Yes; I did one about five years ago. Unfortunately it was a
    contract job for a client and I'm not free to release it.
    Here's a sample of the text files to control it...

    RE 500 ns Reset for 500ns
    WU 1 US Wait Until sim time = 1 us
    # set up defaults for future transfers
    SE AM 0D Address modifier - extended supervisor transfers
    SE LW 0 Longword access ON by default
    SE IE 00 No interrupts enabled just now
    # read a location or two
    RD 10000000 00 Read a word from 0x10000000 - this should bus-error!
    RD 20000000 00 Read a word from 0x20000000 - this should work
    # set up some good block data
    BD 5 12345678 these commands build block data in the model,
    BD 6 66666666 and don't actually perform any transfers
    BD 7 87654321
    BD 8 9ABCDEF0
    BD 9 09ABCDEF
    # do a couple of block transfers
    BR 28000000 10 block read from bus into model's memory
    BW 380000F8 5 5 block write from model's memory to bus
    BW 38000000 10 5
    # and a couple of interrupt acks
    IA 4 perform an interrupt acknowledge on priority 5
    IA 5

    The "file controlled" part is easy enough - just the usual
    business of defining a file format that's nice and easy to parse,
    then writing a wad of VHDL that will trawl through the file
    converting textual "commands" into suitable internal record
    data structures that can be used to control the VMEbus BFM.
    However, writing a BFM that looks like a VMEbus slot is not
    trivial - the bus is tiresomely asynchronous, and it supports
    various kinds of pipelined transfer (next cycle's address phase
    overlaps with this cycle's data transfer, etc) that are not at
    all easy to code. I got most of it right in the end, but it
    was hard work.

    VMEbus is an asynchronous dinosaur in these synchronous times.
    --
    Jonathan Bromley, Consultant

    DOULOS - Developing Design Know-how
    VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services

    Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
    Tel: +44 (0)1425 471223 mail:
    Fax: +44 (0)1425 471573 Web: http://www.doulos.com

    The contents of this message may contain personal views which
    are not the views of Doulos Ltd., unless specifically stated.
     
    Jonathan Bromley, Nov 22, 2005
    #5
  6. smu

    smu Guest

    Nicolas Matringe a écrit :
    > smu a écrit:
    >
    >>I am new on VMEbus. And I am curious to know if somebody wrote a "file
    >>controlled VMEbus testbench" which support interrupt acknowledge process ?

    >
    >
    > Hi
    > I did but it's somewhere in Mike's Google search results so I don't
    > think you'll like it ;o)
    > Anyway I can answer questions in my spare time.
    >
    > Nicolas
    >


    Hi Nicolas,

    The only one if found is the one from Tom Rust & Don Day. I did not find
    your test bench (I am probably awkward or unlucky). Is it free? If yes,
    where can I download it?

    smu
     
    smu, Nov 22, 2005
    #6
  7. smu a écrit:
    > The only one if found is the one from Tom Rust & Don Day. I did not find
    > your test bench (I am probably awkward or unlucky).


    I actually designed a VIC068A IP but I also had to write a testbench
    for it. Unluckily for you, none of these are free. We don't even give
    the testbench code to our clients, only a precompiled library.

    Nicolas
     
    Nicolas Matringe, Nov 22, 2005
    #7
  8. smu

    smu Guest

    Nicolas Matringe a écrit :
    > smu a écrit:
    >
    >>The only one if found is the one from Tom Rust & Don Day. I did not find
    >>your test bench (I am probably awkward or unlucky).

    >
    >
    > I actually designed a VIC068A IP but I also had to write a testbench
    > for it. Unluckily for you, none of these are free. We don't even give
    > the testbench code to our clients, only a precompiled library.
    >
    > Nicolas
    >


    Hi Nicolas,

    I cannot find one information in the VME standard : Are the block
    operation atomic ?

    Thank you in advance

    smu
     
    smu, Nov 23, 2005
    #8
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