What does this AHDL code mean?

Discussion in 'VHDL' started by methi, Jun 22, 2005.

  1. methi

    methi Guest

    Hi,

    I have some questions regarding the following piece of code...

    In the AHDL code, the following variable is declared as below:

    HDET_REG : DFF;

    Its been used in the code as follows:

    HDET_REG.CLK = DIGRESET;
    HDET_REG.D = VCC;
    HDET.REG.CLRN = !HDET;

    My question is that....how does this DFF work

    How does CLRN affect the output HDET_REG.Q

    Any help is greatly appreciated.

    Thank you,

    Methi
     
    methi, Jun 22, 2005
    #1
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  2. methi

    info_ Guest

    methi wrote:

    > Hi,
    >
    > I have some questions regarding the following piece of code...
    >
    > In the AHDL code, the following variable is declared as below:
    >
    > HDET_REG : DFF;
    >
    > Its been used in the code as follows:
    >
    > HDET_REG.CLK = DIGRESET;
    > HDET_REG.D = VCC;
    > HDET.REG.CLRN = !HDET;


    Probable typo :
    HDET_REG.CLRN = !HDET;

    Sounds like :

    process (DigReset, Hdet)
    begin
    if Hdet ='1' then
    HDET_Reg <= '0';
    elsif rising_edge(DigReset) then
    HDET_Reg <= '1';
    end if;
    end if;
    end process;


    Asynchronous rising edge detector.
    Bad practice. Probably from a very small PLD, old design.

    Bert Cuzeau
     
    info_, Jun 23, 2005
    #2
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