What official function should I call to genertate a sum of products in VHDL

Discussion in 'VHDL' started by Weng Tianxiang, Mar 17, 2007.

  1. Hi,
    What official functions should I call to genertate a sum of products
    in VHDL?

    S(...) <= A0*B0(...) + A1*B1(...) + A2*B2(...) + ... + An*Bn(...);

    Ax is a type of std_logic or bool; Bx() is a type of std_logic_vector
    or unsigned.

    I use the following two libraries:
    USE ieee.std_logic_1164.all;
    use ieee.numeric_std.all;

    Thank you.

    Weng
     
    Weng Tianxiang, Mar 17, 2007
    #1
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  2. Re: What official function should I call to genertate a sum of productsin VHDL

    Weng Tianxiang schrieb:

    > What official functions should I call to genertate a sum of products
    > in VHDL?
    >
    > S(...) <= A0*B0(...) + A1*B1(...) + A2*B2(...) + ... + An*Bn(...);
    >
    > Ax is a type of std_logic or bool; Bx() is a type of std_logic_vector
    > or unsigned.


    Looks similar to standard multiplication. What about:

    process(A,B)
    variable result : unsigned(result_bits-1 downto 0);
    begin
    result:=to_unsigned(0,result'length);
    for N in A'range loop
    if (A(N)='1') then
    result:=result+resize(unsigned(B(N)),result'length);
    end if;
    end loop;
    s<=result;
    end process;

    (code not checked for any errors - just typed)

    This may result in synthesis in a slow carry-ribble array. As an
    alternative you could use this for-loop to first generate a 2D-vector
    table containing eigther zero vectors or B-vectors (depending on A).
    This 2D-Array could be added as multipliers do: Carry-Save-Array,
    Wallace-Tree...


    Another option would be to make each A-Bits a vector:
    A_vec(N)<=('0' & A(N));
    Such a vector can be easily converted to unsigned and you can just type
    you sum of products, as you have done it in your question.


    Ralf
     
    Ralf Hildebrandt, Mar 17, 2007
    #2
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  3. Weng Tianxiang

    Paul Guest

    Weng,

    If Ax is of type std_logic, you only has 2 very trivial cases to
    cover. Using multipliers would be a gigantic waste of FPGA
    resources... since you have no "non-trivial" cases to concern
    yourself with, you have a much simpler option than multipliers.
    Personally, I don't think students should be given answers from a
    message board, so that's as much of a hint as I am personally willing
    to give you (sorry, the problem is trivial enough to be a quite
    obvious homework assignment) But, think about what I said and why
    your 2 cases are very trivial....

    -Paul

    P.S. - It's actually trivial enough that a decent synthesizer would
    not synthesize multipliers if you did it that way anyway.... at least
    it shouldn't.


    On Mar 16, 10:02 pm, "Weng Tianxiang" <> wrote:
    > Hi,
    > What official functions should I call to genertate a sum of products
    > in VHDL?
    >
    > S(...) <= A0*B0(...) + A1*B1(...) + A2*B2(...) + ... + An*Bn(...);
    >
    > Ax is a type of std_logic or bool; Bx() is a type of std_logic_vector
    > or unsigned.
    >
    > I use the following two libraries:
    > USE ieee.std_logic_1164.all;
    > use ieee.numeric_std.all;
    >
    > Thank you.
    >
    > Weng
     
    Paul, Mar 19, 2007
    #3
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