what's the difference between VHDL 93 CONCATENATION and VHDL 87 CONCATENATION?

Discussion in 'VHDL' started by walala, Sep 13, 2003.

  1. walala

    walala Guest

    Dear all,

    In my code I have the following line:

    index1:=CONV_INTEGER('0' & count(4 downto 2));

    I want to take the 4 downto 2 bits of "count", then put a "0" in front of it
    and then change to INTEGER type, the reason why I prefix a "0" is to get a
    unsigned integer result.

    After synthesis by Synposys DC, I got the following warning:

    Warning: VHDL-93 generates different concatenation results from VHDL-87
    in routine myidct line 138 in file
    '/home/min/a/xding/EE495d/Lab4/source/myidct.vhd'. (VHDL-2285)
    Warning: VHDL-93 generates different concatenation results from VHDL-87
    in routine myidct line 104 in file
    '/home/min/a/xding/EE495d/Lab4/source/myidct.vhd'. (VHDL-2285)

    I don't have either 93 or 87 on my hand... can anybody tell me what is the
    difference? And will I get my expected results?

    Thanks a lot,

    -Walala
     
    walala, Sep 13, 2003
    #1
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  2. walala

    David Jones Guest

    In article <bjvgjq$rpa$>, walala <> wrote:
    >In my code I have the following line:
    >
    > index1:=CONV_INTEGER('0' & count(4 downto 2));
    >
    >I want to take the 4 downto 2 bits of "count", then put a "0" in front of it
    >and then change to INTEGER type, the reason why I prefix a "0" is to get a
    >unsigned integer result.
    >
    >After synthesis by Synposys DC, I got the following warning:
    >
    >Warning: VHDL-93 generates different concatenation results from VHDL-87
    > in routine myidct line 138 in file
    >'/home/min/a/xding/EE495d/Lab4/source/myidct.vhd'. (VHDL-2285)
    >Warning: VHDL-93 generates different concatenation results from VHDL-87
    > in routine myidct line 104 in file
    >'/home/min/a/xding/EE495d/Lab4/source/myidct.vhd'. (VHDL-2285)
    >
    >I don't have either 93 or 87 on my hand... can anybody tell me what is the
    >difference? And will I get my expected results?


    The only difference is the bounds of the result, which changed from VHDL-87
    to VHDL-93. I'm not sure what those bounds are in this case, and it
    doesn't matter. In 99% of situations, the slice is used in a context
    where it doesn't matter, and the Synopsys warning is pure noise.

    You can ignore this warning; you will get expected results.

    BTW, what math package are you using? If you use ieee.numeric_std like
    you should, then you can say:

    index1 := to_integer(unsigned(count(4 downto 2)));

    Much cleaner and no warnings. Even better would be to declare "count"
    as unsigned.
     
    David Jones, Sep 14, 2003
    #2
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  3. For your concatenation qustion see
    http://www.vhdl.org/vi/comp.lang.vhdl/FAQ1.html#concat

    Do you need the concatenation with a '0' ?
    From 'conv_...' is assume you are using the synopsys package(s):
    - If count is a of type std_logic_vector and you are using the package
    std_logic_UNSIGNED the conv_integer will interpreted it as an unsigned (no
    zero extension is needed)

    - if count is a of type unsigned and you are using the package
    std_logic_arith the conv_integer will interpreted it as an unsigned (no zero
    extension is needed)

    - If count is a of type std_logic_vector and you are using the package
    std_logic_SIGNED the conv_integer will interpreted it as a signed (the zero
    extension is needed)

    - if count is a of type signed and you are using the package std_logic_arith
    the conv_integer will interpreted it as an signed; now you have two
    solutions: a) extend with a '0', or b) type conversion
    CONV_INTEGER(unsigned( count(4 downto 2)));

    I prefer to use the type SIGNED or UNSIGNED for a vector has such an
    interpretation in a design. In that case you can use the synopsys package
    std_logic_arith (the std_logic_unsigned and std_logic_signed are not
    needed). Or consider moving to the ieee package numeric_std. This package is
    very similar to std_logic_arith. One change is that functions that start
    with 'conv_..' are to be replaced with 'to_..'.

    Egbert Molenkamp


    "walala" <> wrote in message
    news:bjvgjq$rpa$...
    > Dear all,
    >
    > In my code I have the following line:
    >
    > index1:=CONV_INTEGER('0' & count(4 downto 2));
    >
    > I want to take the 4 downto 2 bits of "count", then put a "0" in front of

    it
    > and then change to INTEGER type, the reason why I prefix a "0" is to get a
    > unsigned integer result.
    >
    > After synthesis by Synposys DC, I got the following warning:
    >
    > Warning: VHDL-93 generates different concatenation results from VHDL-87
    > in routine myidct line 138 in file
    > '/home/min/a/xding/EE495d/Lab4/source/myidct.vhd'. (VHDL-2285)
    > Warning: VHDL-93 generates different concatenation results from VHDL-87
    > in routine myidct line 104 in file
    > '/home/min/a/xding/EE495d/Lab4/source/myidct.vhd'. (VHDL-2285)
    >
    > I don't have either 93 or 87 on my hand... can anybody tell me what is the
    > difference? And will I get my expected results?
    >
    > Thanks a lot,
    >
    > -Walala
    >
    >
     
    Egbert Molenkamp, Sep 16, 2003
    #3
  4. walala

    walala Guest

    Dear Egbert,

    Thanks for your answer.

    Yeah, exactly, I am using the SIGNED package and "count" is of type
    std_logic_vector,...

    But I meant to make it unsigned, because it's not very good to
    interpreate a counter to be a signed value... however, I used SINGED
    package because I need to use signed multiplication somewhere else in
    my circuit...

    So I am kind of mixing signed and unsigned here... It is great that I
    found them work through experiment... Thanks for pointing out that for
    me!

    -Walala

    "Egbert Molenkamp" <> wrote in message news:<bk6dsl$h52$>...
    > - If count is a of type std_logic_vector and you are using the package
    > std_logic_SIGNED the conv_integer will interpreted it as a signed (the zero
    > extension is needed)
    >
     
    walala, Sep 18, 2003
    #4
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