wireload model./custom wl creation

Discussion in 'VHDL' started by whizkid777@gmail.com, Feb 15, 2005.

  1. Guest

    hi all,
    I use tsmc .13u library for pre layout synthesis. I have an option of
    selecting tsmc13_wl10,tsmc13_wl20,tsmc13_wl30,tsmc13_wl40,tsmc13_wl50
    for this. TSMC didnt give any area range on which I can select the WL
    models. How do do select a model for my design. say my block area is
    35kgates.

    Also I wanted to know that whether we can create a custom wirelaod
    model without floorpalnning and PnR ..If yes how..

    Also please tell me how good is DC for .13u, do u think physical
    compiler is essential for this process?

    thanks
    John
     
    , Feb 15, 2005
    #1
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  2. Neo Guest

    This is a mostly laguage forum so you might not be able to get a good
    response for this query. I suggest you post it to snug group in
    deepchip.com.
     
    Neo, Feb 16, 2005
    #2
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