8bit counter to 7seg

[jo.spreutels]

Hi,

For a project we have to make an 8bitcounter which exists of two 4
bit-counters.
The 8bit counters drives two 7seg displays on a spartan 2 board.
I use also 3 buttons on the board as enable,updown and reset.
In simulation the counters are working perfect but in hardware the
thing doesn't do much.
Is it possible to have a look at the code?

this is the 4 bit counter:


library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- Uncomment the following lines to use the declarations that are
-- provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity teller is
Port ( enable : in std_logic;
up_down : in std_logic;
clock : in std_logic;
reset : in std_logic;
carry : out std_logic;
uit : out std_logic_vector(3 downto 0));




end teller ;



architecture Behavioral of teller is


begin


process (clock, reset,enable,up_down)

variable count : integer range 0 to 15;
begin
if reset='1' then
count := 0;
elsif clock='1' and clock'event then
carry <= '0';
if (enable='1') then
if up_down='1' then
if (count = 15) then
count := 0 ;
else
count := count + 1;
if (count = 15) then
carry <='1';
end if;
end if;
else
if (count = 0) then
count:=15;
else
count := count - 1;
if (count = 0) then
carry <='1';
end if;
end if;
end if;
end if;
end if;

uit <= CONV_STD_LOGIC_VECTOR(count, 4) ;

end process;




end Behavioral;


this is the 8bitcounter:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- Uncomment the following lines to use the declarations that are
-- provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity eightbitcounter is
Port ( enable8 : in std_logic;
clock8 : in std_logic;
up_down8 : in std_logic;
carry8 : out std_logic;
reset8 : in std_logic;
uit8 : out std_logic_vector(7 downto 0));
end eightbitcounter;

architecture Behavioral of eightbitcounter is

component teller
port ( enable : in std_logic;
up_down : in std_logic;
clock : in std_logic;
reset : in std_logic;
carry : out std_logic;
uit : out std_logic_vector(3 downto 0));
end component;

signal enableh: std_logic; --signaal enablehigh
signal carryh: std_logic; --signaal carryhigh

begin

counter_L:teller
port map ( enable => enable8,
up_down => up_down8,
clock => clock8,
reset => reset8,
carry => enableh, --carry van de tellerlow verbinden met
enablehigh
uit => uit8 (3 downto 0)
);

counter_H:teller
port map ( enable => enableh, --enable van de tellerhigh verbinden
met enablehigh
up_down => up_down8,
clock => clock8,
reset => reset8,
carry => carryh, --carry van tellerhigh verbinden met carryhigh
uit => uit8 (7 downto 4)
);

process (enable8, clock8, reset8)
begin

if (enableh = '1' and carryh = '1') then
carry8 <= '1';
else
carry8 <= '0';
end if;

end process;

end Behavioral;


this is the overall program which drives the buttons and the 7seg

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- Uncomment the following lines to use the declarations that are
-- provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity sevenseg is
Port ( clockC8 : in std_logic;
C_PB: out std_logic;
uitC8 : out std_logic_vector(7 downto 0); --olala
muxC8 : out std_logic_vector(2 downto 0);
ramre : out std_logic;
ramwe : out std_logic;
flashre : out std_logic;
flashwe : out std_logic);
end sevenseg;


architecture Behavioral of sevenseg is


--8bitcounter invoeren
component eightbitcounter is
port (
enable8 : in std_logic;
up_down8 : in std_logic;
clock8 : in std_logic;
reset8 : in std_logic;
carry8 : out std_logic;
uit8 : out std_logic_vector(7 downto 0)
);
end component;

--signalen teller
signal enable_8: std_logic ;
signal up_down_8: std_logic;
signal reset_8: std_logic;
signal carry_8: std_logic;
signal uitgang_8: std_logic_vector (7 downto 0);


--signalen voor klokdeling

signal klok_200: std_logic;
signal klok_2: std_logic;


-- signaal voor muxsturing
signal mux: std_logic_vector (2 downto 0);

-- voor 7segment aansturing
signal sturingsg: std_logic_vector (3 downto 0);

-- signaal voor controle push buttons
signal buttonctrlC8: std_logic;


begin

-- control pb assignen
C_PB <= buttonctrlC8;

--init tellen
enable_8 <='1';
reset_8 <= '0';


-- initialisatie ram/flash signals
ramre <= '1';
ramwe <= '1';
flashre <= '1';
flashwe <='1';




--8bit teller
teller_8: eightbitcounter
port map (
enable8 =>klok_2 ,
up_down8 => up_down_8,
clock8 => clockC8,
reset8 => reset_8,
carry8 => carry_8,
uit8 => uitgang_8 (7 downto 0)
);


--klokdeling
klokdeling1: process (clockC8)

variable tel_klok200 : integer range 0 to 2**18-1;


begin
if (clockC8'event and clockC8 = '1') then



if (tel_klok200 = 2**18-1) then --200Hz
tel_klok200 := 0;
klok_200 <= '1';

else
tel_klok200 := tel_klok200 + 1;
klok_200 <= '0';
end if;
end if;
end process klokdeling1;

klokdeling2: process (clockC8)

variable tel_klok2 : integer range 0 to 2**6-1;
begin
if (clockC8'event and clockC8 = '1') then
if (klok_200 = '1') then



if (tel_klok2 =2**6-1) then --2Hz
tel_klok2 := 0;
klok_2 <= '1';
else
tel_klok2 := tel_klok2 + 1;
klok_2 <= '0';
end if;
end if;
end if;
end process klokdeling2;

--muxsturing
muxsturing: process (klok_200)
variable muxcount : integer range 0 to 9;

begin -- begin process muxsturing

if (klok_200 = '1') then -- wisselen tussen U7 en U8 (U7 hoogste 4
bits)

muxcount := muxcount + 1;

case muxcount is
when 0 => mux <= "100";
sturingsg (3 downto 0) <= uitgang_8 (7 downto 4);

when 1 => mux <= "101";
sturingsg (3 downto 0) <= uitgang_8 (3 downto 0);

when 2 => mux <= "000";
uitC8<= "00000001";
if (buttonctrlC8 = '1') then
reset_8 <= '1';
end if;
when 3 => mux <= "100";
sturingsg (3 downto 0) <= uitgang_8 (7 downto 4);

when 4 => mux <= "101";
sturingsg (3 downto 0) <= uitgang_8 (3 downto 0);

when 5 => mux <= "000";
uitC8<= "00000010";
if (buttonctrlC8 = '1') then
up_down_8 <= '0';
end if;

when 6 => mux <= "100";
sturingsg (3 downto 0) <= uitgang_8 (7 downto 4);

when 7 => mux <= "101";
sturingsg (3 downto 0) <= uitgang_8 (3 downto 0);

when 8 => mux <= "000";
uitC8<= "00000100";
if (buttonctrlC8 = '1') then
enable_8 <= '0';
end if;

when others => muxcount := 0;

end case;
end if;





if (mux = "100" or mux = "101") then
case sturingsg is
when "0000" => uitC8 <= "00111111"; --code:dp f g e d c b a
when "0001" => uitC8 <= "00000110";
when "0010" => uitC8 <= "01011011";
when "0011" => uitC8 <= "01001111";
when "0100" => uitC8 <= "01100110";
when "0101" => uitC8 <= "01101101";
when "0110" => uitC8 <= "01111101";
when "0111" => uitC8 <= "00000111";
when "1000" => uitC8 <= "01111111";
when "1001" => uitC8 <= "01101111";
when "1010" => uitC8 <= "01110111";
when "1011" => uitC8 <= "01111100";
when "1100" => uitC8 <= "00111001";
when "1101" => uitC8 <= "01011110";
when "1110" => uitC8 <= "01111001";
when "1111" => uitC8 <= "01110001";
when others => uitC8 <= "00010100";
end case;

end if;

muxC8 <= mux;

end process muxsturing;

end Behavioral;


thanks for having a look at it!

 

[Neo]

I havent looked into all of the code but what is the clock frequency
you are using. if you are not reducing the clock to viewable speeds
such as 1-5 hz then its difficult to make out anything on the LEDs.

 

[jo.spreutels]

the frequency is 48 MHz but I use 2 Hz for the led's and 200 hz to
change between the two displays

 

[Tom Verbeure]

Some remarks:
- In cases like this, consider running simpler code on the FPGA first,
to make sure that you are correctly programming the device. E.g. create
a blinking led.
- process 'muxsturing' is very strange: the way it is currently coded,
it will create a latch, but I doubt that this is your intention. If you
want pure combinational logic there, you will have to complete the
sensitivity list AND you'll have to do something about "muxcount :=
muxcount +1", because this statement requires the instantiation of
memory elements. Without looking at the code it more detail, I'm pretty
sure this is where things are going wrong.

Tom

 

[ajahn]

I also only had a short look at your code, but it looks like the carry
of your teller component will never get asserted. This is because you
check for count = 15 (count = 0 for decrementing) within a branch of
the if-clause the will never be entered, when (count = 15). The count
signal will be updated at the end of your process not right after the
incrementation statement.

This will work as you probably expect:

if up_down='1' then
if (count = 15) then
count := 0 ;
carry <='1';
else
count := count + 1;
end if;
else
if (count = 0) then
count:=15;
carry <='1';
else
count := count - 1;
end if;
end if;

Cheers,
Andreas.

 

[Tim McCoy]

Hi,

For a project we have to make an 8bitcounter which exists of two 4
bit-counters.
The 8bit counters drives two 7seg displays on a spartan 2 board.
I use also 3 buttons on the board as enable,updown and reset.
In simulation the counters are working perfect but in hardware the
thing doesn't do much.
Is it possible to have a look at the code?

thanks for having a look at it!

If its simulating correctly at a post-synthesis level, then you're
probably not enabling the segment LED displays properly. Theres a module
on my website that I generated recently for this purpose - it might help,
considering I used it for a single unit 8-bit counter, outputting the hex
count to two units of a four segment display on a Spartan-3 board!

http://home.swiftdsl.com.au/~tmccoy/index.php?option=content&task=view&id=107&Itemid=32

You need to (somewhat slowly) drive the control signals out to the display
anodes, then assert the control signals as required.

I'd also suggest assigning the pins of the 8-bit count output bus to
simple LEDs first, so make sure its working.

Are you holding the "buttons", which are instant action (only on whilst
PUSHED) - you'd be better assigning these inputs to slide switches. Also

The code was difficult to read with the variables in (german?), but have
you also divided down the (50MHz) system clock into human readable
increments of about 1Hz?

This link is my 8-bit counter that might help you along.

http://home.swiftdsl.com.au/~tmccoy/index.php?option=content&task=view&id=101&Itemid=32

Cheers

Tim

--
"Linux... because rebooting is for adding new hardware!"

http://home.swiftdsl.com.au/~tmccoy
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