Block Diagram Viewer / Hierarchy Parser for VHDL/Verilog?

[jjohnson]

Does anyone know where I can find a public domain / open source tool
that will read a bunch of VHDL and/or Verilog files, and generate a
block diagram from them?

VGUI-2 (http://www.atl.external.lmco.com/projects/rassp2/vgui/) will
generate VHDL from block diagrams; the reverse process was listed as a
future enhancement, but the latest update seems to be two years old.

Does anyone know if the Hierarchy Surfer script (at
http://www.deepchip.com/downloadpage.html) has been updated (since
2000) and posted anywhere for the general public?

Has anyone adapted an older version of Hierarchy Surfer to generate
block diagrams?

Thanks 2^32 for your help...

mj

 

[Mike Treseler]

Does anyone know where I can find a public domain / open source tool
that will read a bunch of VHDL and/or Verilog files, and generate a
block diagram from them?

I don't think there is one.
Quartus/Mentor/Synplicity have an hdl viewer
that can do entity boxes and wires.
Modelsim has a data flow viewer that shows
processes and signals.

What would you do with this diagram
if you had it?

If the aim were to learn a design by others,
I would write a testbench and watch
it run on a simulator.

If the aim were to document the
design, I would do it as comments
in the source and testbench code.

-- Mike Treseler

 

[Colin Marquardt]

If the aim were to document the
design, I would do it as comments
in the source and testbench code.

I document testcases as comments with a special prefix. These are
then filtered out and processed with LaTeX, giving a nice PDF
file. One could also embed diagrams in description languages like
pstricks, metapost, dot, pic etc. and handle them in the same way.
If somebody has already done this, I'd love to hear about it.

To the original poster: take a look at emacs' vhdl-mode and its
integration into speedbar for a hierarchy parser.

Cheers,
Colin

 

[Mike Treseler]

I document testcases as comments with a special prefix. These are
then filtered out and processed with LaTeX, giving a nice PDF
file. One could also embed diagrams in description languages like
pstricks, metapost, dot, pic etc. and handle them in the same way.
If somebody has already done this, I'd love to hear about it.

I stick to plain text with block diagrams like this

--[foo]---[bar]---[bas]--

and timing diagrams like this
--foo ___--__-_-__----
--bar ___-____-_-_-___

I like to print out code and lay down
and mark it up, so I limit my lines to 78 characters and
use the vhdl-print-two-column setting in vhdl-mode.

To the original poster: take a look at emacs' vhdl-mode and its
integration into speedbar for a hierarchy parser.

Yes, that meets the OP's public domain / open source spec,
and there is no better way to navigate a complex design.

-- Mike Treseler

 

[Anton Erasmus]

I don't think there is one.
Quartus/Mentor/Synplicity have an hdl viewer
that can do entity boxes and wires.
Modelsim has a data flow viewer that shows
processes and signals.

What would you do with this diagram
if you had it?

I have found the Quartus RTL Viewer a tremendous help in developing
a feel for what logic would be generated by what code. It is also
immediately obvious if one has left out a default value for a case
structure and other simple errors that make a huge difference in the
generated logic.

If the aim were to learn a design by others,
I would write a testbench and watch
it run on a simulator.

If the aim were to document the
design, I would do it as comments
in the source and testbench code.

It has also been useful where clients have insisted that they want a
schematic version of the EPLD code.

Regards
Anton Erasmus

 

[Jahagirdar Vijayvithal S]

["Followup-To:" header set to comp.lang.verilog.]
Sounds like what doxygen does for C++ code. Has anyone written a verilog
parser for doxygen?
Regards
Jahagirdar Vijayvithal S

I document testcases as comments with a special prefix. These are
then filtered out and processed with LaTeX, giving a nice PDF
file. One could also embed diagrams in description languages like
pstricks, metapost, dot, pic etc. and handle them in the same way.
If somebody has already done this, I'd love to hear about it.

To the original poster: take a look at emacs' vhdl-mode and its
integration into speedbar for a hierarchy parser.

Cheers,
Colin

Regards
Jahagirdar Vijayvithal S