Configurable hardware thro' VHDL

Discussion in 'VHDL' started by dutta, Aug 13, 2003.

  1. dutta

    dutta Guest

    Hi Friends,

    Suppose my VHDL design has different functional modes and separate
    hardware logic for each modes. I have a enum type defined and
    each mode is represented by an enum literal.

    Something like,
    type operMode is (mode1, mode2, mode3, mode4) ;

    Now the design is targeted towards different application and each
    application has a subset of the operating modes. I want to keep
    my VHDL code common and generate different hardwares for different
    application. One possible way is to use constants and perform
    conditional compilation.

    My design has lot of constructs as follows

    case FuncMode is -- FuncMode variable of type operMode

    when mode1 =>
    < logic for 1 > -- combinational logic
    when mode2 =>
    < logic for 2 >
    when mode3 =>
    < logic for 3 >
    when mode4 =>
    < logic for 4 >
    end case ;

    Say target application 1 supports only mode1 and mode2. To remove
    h/w logic specific to mode3 and mode4 we can use constants like

    if (Target_Appl2 = true) then -- boolean type constant
    Target_Appl2 will be
    < logic for 3 > -- false during Target Appl 1
    < logic for 4 > -- Separate constants defined for
    Target Appl 1
    end if ;

    But in this way I have to write this constant qualifiers with if
    in lot of places in the code. I am trying for better solution which
    is more
    cryptic (if possible).

    Basicaly I'm trying to use the knowledge that some modes are not
    for particular target application(this is static, not dynamic). So
    if I use some constants during assignment of FuncMode such that some
    modes are not at all possible, will the logic for this modes be
    optimised by the tool automaticaly (i.e. without writing the if as
    mentioned before) ?

    Pls suggest if there is a better and efficient way to do this.

    dutta, Aug 13, 2003
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