Converting C to VHDL

S

sarath1111

Hi all,
Can any one inform me the various steps needed to convert a C coding
in to VHDL. Please tell the list of Websites that gives information
regarding this topic.
Thanks in Advance,
Sarath
 
M

Mark McDougall

Can any one inform me the various steps needed to convert a C coding
in to VHDL. Please tell the list of Websites that gives information
regarding this topic.

IMHO...

1. Understand what the C code is trying to achieve, and what algorithms
are used to achieve that.

2. Think about how that same problem might be solved in hardware
consisting of memories and combinatorial logic (using FSMs, registers, etc).

3. Understand how you may use VHDL to describe the above-mentioned hardware.

4. Throw the C source code in the bin, try to forget everything about
how it *ran*, and start writing your VHDL.

This is not just a flippant remark. You really need to get into a
different mindset to write in a HDL.

Having said that, there are $$$ tools that claim to be able to do
exactly what you need. I'm not sure if anyone has ever done anything
useful with them though...?!?

Regards,
Mark
 
M

mk

IMHO...

1. Understand what the C code is trying to achieve, and what algorithms
are used to achieve that.

2. Think about how that same problem might be solved in hardware
consisting of memories and combinatorial logic (using FSMs, registers, etc).

3. Understand how you may use VHDL to describe the above-mentioned hardware.

4. Throw the C source code in the bin, try to forget everything about
how it *ran*, and start writing your VHDL.

Then how are you supposed to prove that your rtl does the same thing
as the c code ? Instead of throwing away your c code, if you think
ahead and write your c code so that it resembles your datapth you can
dump the input, output of the c code and compare it with the rtl
implementation in your test-bench. This is especially easy if you use
fixed point in your c code so you can do bit-accurate comparisons.
Even with floating point, you can compare within an acceptable
error-range. In my opinion it is never a good idea to throw away
perfectly good design which can be re-used with some fore-thought.
 
M

mk

Hi all,
Can any one inform me the various steps needed to convert a C coding
in to VHDL. Please tell the list of Websites that gives information
regarding this topic.

Depends on what type of C code you're trying to convert. The way I use
C is as a rapid prototyping language for DSP algorithm development. In
this domain the data is always a large array and my algorithms work on
small blocks of this data and the variable which tracks the block is
usually time. So there is a large bounding loop within which the
algorithm is implemented. This type of C can be converted to RTL
relatively easily by figuring out which variables are storage and
which are combinational calculations and writing the corresponding
RTL. After your RTL coding is done, you can dump the input/output of
the loop body and compare against your RTL results in your test-bench.
 
M

Mark McDougall

mk said:
Then how are you supposed to prove that your rtl does the same thing
as the c code ? Instead of throwing away your c code, if you think
ahead and write your c code so that it resembles your datapth you can
dump the input, output of the c code and compare it with the rtl
implementation in your test-bench. This is especially easy if you use
fixed point in your c code so you can do bit-accurate comparisons.
Even with floating point, you can compare within an acceptable
error-range. In my opinion it is never a good idea to throw away
perfectly good design which can be re-used with some fore-thought.

Sure, but you're assuming the OP has C code written with eventual
conversion to VHDL in mind. With "foresight" you could even write COBOL
that resembles your datapath... (well maybe not COBOL, but you get my
point?)

You're lumping together two quite different problems here...

1. There is some 'proven' C code which someone wants to implement in
VHDL, or

2. The C code was written to prototype an algorithm, and can be used to
verify the VHDL implementation.

In the 1st instance, you have no choice about how the code was written.
And generally, this code is not going to be suitable for straight
conversion to VHDL.

In the 2nd instance, you do - but why would you bother? You're probably
better off in most cases doing a behavioural simultion in Verilog
straight away than bothering with C code. And you can gradually morph
your Verilog into a testbench for your synthesizable design.

Regards,
Mark
 
M

mk

In the 2nd instance, you do - but why would you bother?

If you have to ask, it means you've not done much in this area.
You're probably
better off in most cases doing a behavioural simultion in Verilog
straight away than bothering with C code. And you can gradually morph
your Verilog into a testbench for your synthesizable design.

Which verilog simulator can give you this integrated environment and
the speed of compiled c++ speed with dsp class libraries which can go
between fixed and floating point ?
http://www.dspia.com/receiver/receiver.html
 
M

Mark McDougall

mk said:
If you have to ask, it means you've not done much in this area.
Granted.

Which verilog simulator can give you this integrated environment and
the speed of compiled c++ speed with dsp class libraries which can go
between fixed and floating point ?

OK, I'm going to defer to your experience in this area.

But I would maintain that the answer is probably heavily dependant on
the nature of the original problem (and original C code).

Regards,
Mark
 
M

mk

OK, I'm going to defer to your experience in this area.

Reading my post again, maybe it was a little bit stronger than i
meant. It is just that even C is not the best prototyping tool
sometimes. One starts with Matlab or SPW or some similar system
simulator (check out Ptolemy from Berkeley) to define a system. If you
can't somehow use this existing code as part of your verification
environment, you are losing a lot.
But I would maintain that the answer is probably heavily dependant on
the nature of the original problem (and original C code).

This is definitely true. But even if you're given a windows program
which does audio analysis and does plots and asked to put part of it
into an FPGA, it is better to re-partition the app, separate the block
which would be converted to rtl and use it to verify the fpga.
 
B

Bill McCulley

mk said:
Depends on what type of C code you're trying to convert. The way I use
C is as a rapid prototyping language for DSP algorithm development. In
this domain the data is always a large array and my algorithms work on
small blocks of this data and the variable which tracks the block is
usually time. So there is a large bounding loop within which the
algorithm is implemented. This type of C can be converted to RTL
relatively easily by figuring out which variables are storage and
which are combinational calculations and writing the corresponding
RTL. After your RTL coding is done, you can dump the input/output of
the loop body and compare against your RTL results in your test-bench.
Have you considered Matlab & Simulink. IMHO they put even C to shame in
many aspects for "rapid" DSP algorithm development. And they have
created some rather impressive bridge libraries with both Altera and
Xilinx that contain directly synthesizable blocks for the latest
families. The Xilinx Virtex 4 SX family in particular has some distinct
advantages over the fastest TI or Analog DSP by sheer weight of its
parallelism.

Anyway, something to consider. I like C code myself - of course long
before I picked up C I was using Matlab for root locus and feedback
control systems, old school style.

Bill McCulley
Fort Worth, TX
 
B

Bill McCulley

mk said:
Depends on what type of C code you're trying to convert. The way I use
C is as a rapid prototyping language for DSP algorithm development. In
this domain the data is always a large array and my algorithms work on
small blocks of this data and the variable which tracks the block is
usually time. So there is a large bounding loop within which the
algorithm is implemented. This type of C can be converted to RTL
relatively easily by figuring out which variables are storage and
which are combinational calculations and writing the corresponding
RTL. After your RTL coding is done, you can dump the input/output of
the loop body and compare against your RTL results in your test-bench.
Have you considered Matlab & Simulink. IMHO they put even C to shame in
many aspects for "rapid" DSP algorithm development. And they have
created some rather impressive bridge libraries with both Altera and
Xilinx that contain directly synthesizable blocks for the latest
families. The Xilinx Virtex 4 SX family in particular has some distinct
advantages over the fastest TI or Analog DSP by sheer weight of its
parallelism.

Anyway, something to consider. I like C code myself - of course long
before I picked up C I was using Matlab for root locus and feedback
control systems, old school style.

Bill McCulley
Fort Worth, TX
 

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